Hello Allouche,

the "make.py" script was renamed to be the uhd_image_builder.py [1], which
I assume is the one you are referring to when you mention the
"uhd_usrp_builder.py". The fact that your IP is not being correctly picked
up might be related to your makefiles, which you'd have to review
carefully. Have a look at this example [2] and compare it with your
implementation.

Cheers,
- Nicolas


[1]
https://github.com/EttusResearch/fpga/blob/rfnoc-devel/usrp3/tools/scripts/uhd_image_builder.py
[2] https://github.com/ejk43/rfnoc-ootexample

On Sun, May 13, 2018 at 1:14 PM, Allouche Ishai via USRP-users <
[email protected]> wrote:

> Hi everyone,
>
>
>
> I follow the instruction in the following website in order to add new IP
> to my X310.  http://www.synchronouslabs.com/blog/creating-a-custom-
> rfnoc-block-with-using-xillinx-ip
>
>
>
> At the last stage in the website, in order to build the bin file that burn
> to the FPGA, they use the make.py script.
>
> I try to find this script, but I didn’t success ,so I try to build the bin
> with the uhd_usrp_builder.py code.
>
> The problem is, that the IP that I add to the Makefile like in the
> website, don’t really add like all the others IP, that define by default.
>
> The error that I get is : module fir_compiler_0 don’t found. When I look
> on the build.log I saw that my IP don’t add to the project.
>
>
>
> Can someone help me how to download the make.py file or how to finish the
> process with the uhd_usrp_builder.py script.
>
>
>
> Thank in advance,
>
> Ishai
>
>
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