Thank you Derek for the explanations,
As workaround I will have to send continuously.
Just a curiosity, as I am very new in rfnoc development: Where is the
timing of the bursts done in the FPGA? In the DmaFIFO block? And would
it be possible to modify this block such that it sends zeros while no
burst is 'active'?
Best regards,
andreas
On 24.07.2018 16:46, Derek Kozel wrote:
Hello Andreas,
The digital frequency offset is handled in the DUC block which does
not run in the same clock domain as the Radio block. The phase
accumulator register will only increment when samples are being
processed. The simplest way to cause the phase accumulator to
continuously run (from the timing perspective of the DAC) is to send
samples continuously rather than in bursts. This incurs a potentially
significant downside of having to push out the extra samples from the
computer. Since the DUC does not have knowledge of the timestamp data
of each sample it would require invasive changes to make the phase
accumulator look as if it were continuously running between bursts.
Regards,
Derek
On Mon, Jul 16, 2018 at 2:20 PM, Andreas Leuenberger via USRP-users
<usrp-users@lists.ettus.com <mailto:usrp-users@lists.ettus.com>> wrote:
Hello all,
I am using a USRP X310 with a UBX-160 daughterboard. The transmit
signal
on port TX/RX is attenuated and looped back to the receiver on
port RX2.
Every millisecond I am sending a short rectangular pulse (about 10
us long)
using the 'time_spec' attribute of the transmit meta-data
('start_of_burst' and
''end_of_burst are true).
The frequencies of the transmit and receive LO's are set to the same
frequency. Also the digital transmit and receive frequencies
offsets are set
to the same value.
I receive continuously and monitor the phase difference between
the transmitted
and received pulses.
If the digital frequency offset is zero, the phase difference of
consecutive
pulses stays constant, as expected.
If the digital frequency offset is different from zero, the phase
difference
of consecutive pulses jumps.
What causes this phase jumps?
Maybe the digital oscillator of the transmitter is running only
while sending. If yes,
is there a way to force the transmit digital oscillator to run
continuously?
I am using the following software versions:
linux; GNU C++ version 5.4.0 20160609; Boost_105800;
UHD_4.0.0.rfnoc-devel-788-g1f8463cc
Thanks in advance,
andreas
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