Hello,

I am running the gain block testbench from the getting started page. The
first four tests succeed, however the fifth one keeps running without any
conclusive result. Attached is the test result. The other thing I have
noticed is that the test result for the first four is less verbose than the
one given on the getting started page. Some display statements are missing.
Is there a way to make the output more verbose?
I am using UHD 4.0.0.rfnoc-devel-409-gec9138eb and Vivado 2015.
Thank you,
Pratik
delta3@delta3-desktop:~/rfnoc/src/rfnoc-tutorial/build$ make noc_block_gain_tb
Setting up a 64-bit FPGA build environment for the USRP-E3x0...
- Vivado: Found (/opt/Xilinx/Vivado/2015.4/bin)
- Vivado HLS: Found (/opt/Xilinx/Vivado_HLS/2015.4/bin)

Environment successfully initialized.
BUILDER: Checking tools...
* GNU bash, version 4.3.48(1)-release (x86_64-pc-linux-gnu)
* Python 2.7.12
* Vivado v2015.4 (64-bit)
[00:00:00] Executing command: vivado -mode batch -source 
/home/delta3/rfnoc/src/uhd-fpga/usrp3/tools/scripts/viv_sim_project.tcl -log 
xsim.log -nojournal
[00:00:21] Current task: Synthesis +++ Current Phase: Synthesis
[00:00:21] Current task: Synthesis +++ Current Phase: TESTBENCH STARTED: 
noc_block_gain
[00:00:21] [TEST CASE   1] (t=000000000) BEGIN: Wait for Reset...
[00:00:21] Current task: [TEST CASE   1] (t=000000000) BEGIN: Wait for Reset... 
+++ Current Phase: TESTBENCH STARTED: noc_block_gain
[00:00:21] [TEST CASE   1] (t=000001002) DONE... Passed
[00:00:21] Current task: [TEST CASE   1] (t=000001002) DONE... Passed +++ 
Current Phase: TESTBENCH STARTED: noc_block_gain
[00:00:21] [TEST CASE   2] (t=000001002) BEGIN: Check NoC ID...
[00:00:21] Current task: [TEST CASE   2] (t=000001002) BEGIN: Check NoC ID... 
+++ Current Phase: TESTBENCH STARTED: noc_block_gain
[00:00:21] [TEST CASE   2] (t=000001238) DONE... Passed
[00:00:21] Current task: [TEST CASE   2] (t=000001238) DONE... Passed +++ 
Current Phase: TESTBENCH STARTED: noc_block_gain
[00:00:21] [TEST CASE   3] (t=000001238) BEGIN: Connect RFNoC blocks...
[00:00:21] Current task: [TEST CASE   3] (t=000001238) BEGIN: Connect RFNoC 
blo[00:00:21] Current task: [TEST CASE   3] (t=000001238) BEGIN: Connect RFNoC 
blo[00:00:22] Current task: [TEST CASE   3] (t=000001238) BEGIN: Connect RFNoC 
blo[00:00:22] Current task: [TEST CASE   3] (t=000001238) BEGIN: Connect RFNoC 
blocks... +++ Current Phase: TESTBENCH STARTED: noc_block_gain
[00:00:22] [TEST CASE   3] (t=000005457) DONE... Passed
[00:00:22] Current task: [TEST CASE   3] (t=000005457) DONE... Passed +++ 
Current Phase: TESTBENCH STARTED: noc_block_gain
[00:00:22] [TEST CASE   4] (t=000005457) BEGIN: Write / readback user 
registers...
[00:00:22] Current task: [TEST CASE   4] (t=000005457) BEGIN: Write / readback 
[00:00:23] Current task: [TEST CASE   4] (t=000005457) BEGIN: Write / readback 
user registers... +++ Current Phase: TESTBENCH STARTED: noc_block_gain
[00:00:23] [TEST CASE   4] (t=000006888) DONE... Passed
[00:00:23] Current task: [TEST CASE   4] (t=000006888) DONE... Passed +++ 
Current Phase: TESTBENCH STARTED: noc_block_gain
[00:00:23] [TEST CASE   5] (t=000006888) BEGIN: Test sequence...
[00:00:23] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:23] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:24] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:24] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:25] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:25] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:26] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:26] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:27] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:27] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:28] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:28] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:29] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:29] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:30] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:30] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:31] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:31] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:32] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:32] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:33] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:33] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:34] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:34] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:35] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:35] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:36] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:36] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:37] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:37] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:38] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:38] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:39] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:39] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:40] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:40] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:41] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:41] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:42] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:42] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:43] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:43] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:44] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:44] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:45] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:45] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:46] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:46] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:47] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:47] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:48] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:48] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:49] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:49] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:50] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:50] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
[00:00:51] Current task: [TEST CASE   5] (t=000006888) BEGIN: Test sequence... 
+++ Current Phase: TESTBENCH STARTED: noc_block_gain^C

Caught Ctrl-C. Exiting.

/home/delta3/rfnoc/src/uhd-fpga/usrp3/top/../tools/make/viv_simulator.mak:51: 
recipe for target 'xsim' failed
make[4]: *** [xsim] Error 1
CMakeFiles/noc_block_gain_tb.dir/build.make:57: recipe for target 
'CMakeFiles/noc_block_gain_tb' failed
make[3]: *** [CMakeFiles/noc_block_gain_tb] Interrupt
CMakeFiles/Makefile2:99: recipe for target 
'CMakeFiles/noc_block_gain_tb.dir/all' failed
make[2]: *** [CMakeFiles/noc_block_gain_tb.dir/all] Interrupt
CMakeFiles/Makefile2:106: recipe for target 
'CMakeFiles/noc_block_gain_tb.dir/rule' failed
make[1]: *** [CMakeFiles/noc_block_gain_tb.dir/rule] Interrupt
Makefile:186: recipe for target 'noc_block_gain_tb' failed
make: *** [noc_block_gain_tb] Interrupt
`timescale 1ns/1ps
`define NS_PER_TICK 1
`define NUM_TEST_CASES 5

`include "sim_exec_report.vh"
`include "sim_clks_rsts.vh"
`include "sim_rfnoc_lib.svh"

module noc_block_gain_tb();
  `TEST_BENCH_INIT("noc_block_gain",`NUM_TEST_CASES,`NS_PER_TICK);
  localparam BUS_CLK_PERIOD = $ceil(1e9/166.67e6);
  localparam CE_CLK_PERIOD  = $ceil(1e9/200e6);
  localparam NUM_CE         = 1;  // Number of Computation Engines / User RFNoC blocks to simulate
  localparam NUM_STREAMS    = 1;  // Number of test bench streams
  `RFNOC_SIM_INIT(NUM_CE, NUM_STREAMS, BUS_CLK_PERIOD, CE_CLK_PERIOD);
  `RFNOC_ADD_BLOCK(noc_block_gain, 0);

  localparam SPP = 16; // Samples per packet

  /********************************************************
  ** Verification
  ********************************************************/
  initial begin : tb_main
    string s;
    logic [31:0] random_word;
    logic [63:0] readback;
    //shortint gain;
    logic [15:0] gain;

    /********************************************************
    ** Test 1 -- Reset
    ********************************************************/
    `TEST_CASE_START("Wait for Reset");
    while (bus_rst) @(posedge bus_clk);
    while (ce_rst) @(posedge ce_clk);
    `TEST_CASE_DONE(~bus_rst & ~ce_rst);

    /********************************************************
    ** Test 2 -- Check for correct NoC IDs
    ********************************************************/
    `TEST_CASE_START("Check NoC ID");
    // Read NOC IDs
    tb_streamer.read_reg(sid_noc_block_gain, RB_NOC_ID, readback);
    $display("Read GAIN NOC ID: %16x", readback);
    `ASSERT_ERROR(readback == noc_block_gain.NOC_ID, "Incorrect NOC ID");
    `TEST_CASE_DONE(1);

    /********************************************************
    ** Test 3 -- Connect RFNoC blocks
    ********************************************************/
    `TEST_CASE_START("Connect RFNoC blocks");
    `RFNOC_CONNECT(noc_block_tb,noc_block_gain,SC16,SPP);
    `RFNOC_CONNECT(noc_block_gain,noc_block_tb,SC16,SPP);
    `TEST_CASE_DONE(1);

    /********************************************************
    ** Test 4 -- Write / readback user registers
    ********************************************************/
    `TEST_CASE_START("Write / readback user registers");
    random_word = $random();
    tb_streamer.write_user_reg(sid_noc_block_gain, noc_block_gain.SR_GAIN, random_word[15:0]);
    tb_streamer.read_user_reg(sid_noc_block_gain, 0, readback);
    $sformat(s, "User register 0 incorrect readback! Expected: %0d, Actual %0d", readback[15:0], random_word[15:0]);
    `ASSERT_ERROR(readback[15:0] == random_word[15:0], s);
    random_word = $random();
    tb_streamer.write_user_reg(sid_noc_block_gain, noc_block_gain.SR_TEST_REG_1, random_word);
    tb_streamer.read_user_reg(sid_noc_block_gain, 1, readback);
    $sformat(s, "User register 1 incorrect readback! Expected: %0d, Actual %0d", readback[31:0], random_word);
    `ASSERT_ERROR(readback[31:0] == random_word, s);
    `TEST_CASE_DONE(1);
    
    /********************************************************
    ** Test 5 -- Test sequence
    ********************************************************/
    // gain's user code is a loopback, so we should receive
    // back exactly what we send
    `TEST_CASE_START("Test sequence");
    gain = 100;
    tb_streamer.write_user_reg(sid_noc_block_gain, noc_block_gain.SR_GAIN, gain);
    fork
      begin
        cvita_payload_t send_payload;
        for (int i = 0; i < SPP/2; i++) begin
          send_payload.push_back(64'(i));
        end
        tb_streamer.send(send_payload);
      end
      begin
        cvita_payload_t recv_payload;
        cvita_metadata_t md;
        logic [63:0] expected_value;
        tb_streamer.recv(recv_payload,md);
        for (int i = 0; i < SPP/2; i++) begin
          expected_value = i*gain;
          $sformat(s, "Incorrect value received! Expected: %0d, Received: %0d", expected_value, recv_payload[i]);
         `ASSERT_ERROR(recv_payload[i] == expected_value, s);
        end
      end
    join
    `TEST_CASE_DONE(1);
   `TEST_BENCH_DONE;

  end
endmodule
_______________________________________________
USRP-users mailing list
[email protected]
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com

Reply via email to