I have a cross-compile setup for my E312 that is working fine. If I run a benchmark_rate using my compiled UHD and bitfile, it works as intended. I see about 10MHz throughput from the FPGA to the ARM before I start dropping samples, that is about right based on my readings. Now, if I use all of that, and try to do a similar flowgraph in GRC, I run the python I basically have to get below 1MHz sample rate to not lose samples. What's the difference???? GR is obviously playing a part in this, but it UHD is certainly playing a part in the change. I ultimately want to use RFNoC, but I see the issues with both RFNoC radio source and UHD USRP source.
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