In brief, (since the CORDIC algorithm is a simple and fun one to simulate standalone and look at the functions generated as analog waveforms) The zi input (fed from the DDC/DUC phase accumulator) represents an angle as a fraction of 2*Pi. The symmetry of the sin/cos functions is exploited so that the CORDIC algorithm is used to derive functions for 0->Pi angles and thus we strip the MSB of zi and pass the remixing bits as the initial angle value for rotation. Looking at the 2 MSB’s of zi we can determine which of the 4 (pi/2) quadrants our desired phase rotation lies in and, given that quadrant 3 is identical to quadrant 1 negated, and quadrant 2 is equal to quadrant 4 negated, we negate the input signals (xi,yi) we feed to the CORDIC appropriately which has the same effect as if we negated the internal trig functions we are generating inside the CORDIC blocks.
Hope that makes sense. -Ian > On Nov 6, 2018, at 5:54 PM, Robin Coxe via USRP-users > <usrp-users@lists.ettus.com> wrote: > > Hi Immi. This paper is one of the better overviews of the CORDIC algorithm > in FPGAs: http://www.andraka.com/files/crdcsrvy.pdf > <http://www.andraka.com/files/crdcsrvy.pdf> > > Also, if you search the archives of this list, there are threads regarding > the specific application of the CORDIC algorithm in the USRP FPGA designs. > For example: > http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/2013-April/034497.html > > <http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/2013-April/034497.html> > http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/2014-December/039692.html > > <http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/2014-December/039692.html> > > -Robin > > On Tue, Nov 6, 2018 at 8:58 AM imran qureshi via USRP-users > <usrp-users@lists.ettus.com <mailto:usrp-users@lists.ettus.com>> wrote: > Hi, > I want to learn the cordic implementation of the duc_chain, and want to > understand how the quadrant selection is done in the cordic_z.v code for > vector rotation.(fpga > <https://github.com/EttusResearch/fpga/tree/61cdf981dcfe8823b7941840c744b51c7994b79f>/usrp3 > > <https://github.com/EttusResearch/fpga/tree/61cdf981dcfe8823b7941840c744b51c7994b79f/usrp3>/lib > > <https://github.com/EttusResearch/fpga/tree/61cdf981dcfe8823b7941840c744b51c7994b79f/usrp3/lib>/dsp > > <https://github.com/EttusResearch/fpga/tree/61cdf981dcfe8823b7941840c744b51c7994b79f/usrp3/lib/dsp>/cordic_z24.v) > code snippet > > case (zi[zwidth-1:zwidth-2]) > 2'b00, 2'b11 : > begin > x0 <= xi_ext; > y0 <= yi_ext; > end > 2'b01, 2'b10 : > begin > x0 <= -xi_ext; > y0 <= -yi_ext; > end > endcase // case(zi[zwidth-1:zwidth-2]) > Regards, > Immi > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com <mailto:USRP-users@lists.ettus.com> > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com > <http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com> > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
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