On 12/11/2018 04:36 PM, Carlos Alberto Ruiz Naranjo via USRP-users wrote:
Hello,
I have found a USRP1 and I am playing with it. I have this error:
carlos@carlos-pc:~$ sudo uhd_usrp_probe --args="type=usrp1"
[INFO] [UHD] linux; GNU C++ version 7.3.0; Boost_106501;
UHD_4.0.0.rfnoc-devel-702-geec24d7b
[INFO] [USRP1] Opening a USRP1 device...
[INFO] [USRP1] Using FPGA clock rate of 64.000000MHz...
[ERROR] [DBMGR] The daughterboard manager encountered a recoverable
error in init.
Loading the "unknown" daughterboard implementations to continue.
The daughterboard cannot operate until this error is resolved.
AssertionError: m and ref_clock/m >= 1e6 and ref_clock/m <= 2.5e6
in double dbsrx::set_lo_freq(double)
at /home/carlos/rfnoc/uhd/host/lib/usrp/dboard/db_dbsrx.cpp:305
_____________________________________________________
/
| Device: USRP1 Device
| _____________________________________________________
| /
| | Mboard: USRP1
| | serial: 479b9db3
| |
| | Time sources: none
| | Clock sources: internal
| | Sensors:
| | _____________________________________________________
| | /
| | | RX DSP: 0
| | |
| | | Freq range: -32.000 to 32.000 MHz
| | _____________________________________________________
| | /
| | | RX DSP: 1
| | |
| | | Freq range: -32.000 to 32.000 MHz
| | _____________________________________________________
| | /
| | | RX Dboard: A
| | | ID: DBSRX (0x0002)
| | | _____________________________________________________
| | | /
| | | | RX Frontend: 0
| | | | Name: Unknown (0xffff) - 0
| | | | Antennas:
| | | | Sensors:
| | | | Freq range: 0.000 to 0.000 MHz
| | | | Gain Elements: None
| | | | Bandwidth range: 0.0 to 0.0 step 0.0 Hz
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | RX Codec: A
| | | | Name: ad9522
| | | | Gain range pga: 0.0 to 20.0 step 1.0 dB
| | _____________________________________________________
| | /
| | | RX Dboard: B
| | | _____________________________________________________
| | | /
| | | | RX Frontend: 0
| | | | Name: Unknown (0xffff) - 0
| | | | Antennas:
| | | | Sensors:
| | | | Freq range: 0.000 to 0.000 MHz
| | | | Gain Elements: None
| | | | Bandwidth range: 0.0 to 0.0 step 0.0 Hz
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | RX Codec: B
| | | | Name: ad9522
| | | | Gain range pga: 0.0 to 20.0 step 1.0 dB
| | _____________________________________________________
| | /
| | | TX DSP: 0
| | |
| | | Freq range: -44.000 to 44.000 MHz
| | _____________________________________________________
| | /
| | | TX DSP: 1
| | |
| | | Freq range: -44.000 to 44.000 MHz
| | _____________________________________________________
| | /
| | | TX Dboard: A
| | | _____________________________________________________
| | | /
| | | | TX Frontend: 0
| | | | Name: Unknown (0xffff) - 0
| | | | Antennas:
| | | | Sensors:
| | | | Freq range: 0.000 to 0.000 MHz
| | | | Gain Elements: None
| | | | Bandwidth range: 0.0 to 0.0 step 0.0 Hz
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | TX Codec: A
| | | | Name: ad9522
| | | | Gain range pga: -20.0 to 0.0 step 0.1 dB
| | _____________________________________________________
| | /
| | | TX Dboard: B
| | | _____________________________________________________
| | | /
| | | | TX Frontend: 0
| | | | Name: Unknown (0xffff) - 0
| | | | Antennas:
| | | | Sensors:
| | | | Freq range: 0.000 to 0.000 MHz
| | | | Gain Elements: None
| | | | Bandwidth range: 0.0 to 0.0 step 0.0 Hz
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | TX Codec: B
| | | | Name: ad9522
| | | | Gain range pga: -20.0 to 0.0 step 0.1 dB
And the same in GNURadio:
Executing: /usr/bin/python2 -u /home/carlos/top_block.py
[32;1m[INFO] [UHD] [39;0mlinux; GNU C++ version 7.3.0; Boost_106501;
UHD_4.0.0.rfnoc-devel-702-geec24d7b
[32;1m[INFO] [USRP1] [39;0mOpening a USRP1 device...
[32;1m[INFO] [USRP1] [39;0mUsing FPGA clock rate of 64.000000MHz...
[31;0m[ERROR] [DBMGR] [39;0mThe daughterboard manager encountered a
recoverable error in init.
Loading the "unknown" daughterboard implementations to continue.
The daughterboard cannot operate until this error is resolved.
AssertionError: m and ref_clock/m >= 1e6 and ref_clock/m <= 2.5e6
in double dbsrx::set_lo_freq(double)
at /home/carlos/rfnoc/uhd/host/lib/usrp/dboard/db_dbsrx.cpp:305
[33;1m[WARNING] [MULTI_USRP] [39;0mSetting IQ imbalance compensation
is not possible on this device.
INFO: Audio sink arch: alsa
aUaU
Try an older release of UHD--does that help?
The DBSRX is ceftainly supported, and if support has gone away, that's
not design intent as far as I know.
Although, I must point out that the DBSRX was EOLed in favor of the
DBSRX2 nearly a decade ago, and the USRP1 is itself EOLed...
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