Hi,

I am using USRP X310 and when I run these commands: uhd_find_devices,
uhd_usrp_probe, I don't get any results on my terminal. When I run the
above commands with --args addr=192.168.50.2, I get the output. IP
address(static) at the host is 192.168.10.3 with subnet of 255.255.0.0. I
have given the subnet to detect more ip addresses.

As far as I know, the uhd_images_downloader has images correctly installed
in the local library and all the Firmware drivers installed. Can you help
me what is wrong? I have the same issue running GNU radio( the fm receiver
example is not detecting the device/ip address).

Any suggestions would be appreciated! Many thanks in advance.

Here are the outputs, I got:

uhd_find_devices
[INFO] [UHD] linux; GNU C++ version 7.4.0; Boost_106501;
UHD_3.14.0.HEAD-0-g6875d061
No UHD Devices Found

uhd_usrp_probe
[INFO] [UHD] linux; GNU C++ version 7.4.0; Boost_106501;
UHD_3.14.0.HEAD-0-g6875d061
Error: LookupError: KeyError: No devices found for ----->
Empty Device Address

uhd_images_downloader [INFO] Images destination: /usr/local/share/uhd/images
[INFO] Target usrp1_b100_fw_default is up to date.
[INFO] Target x3xx_x310_fpga_default is up to date.
[INFO] Target usrp2_n210_fpga_default is up to date.
[INFO] Target n230_n230_fpga_default is up to date.
[INFO] Target usrp1_b100_fpga_default is up to date.
[INFO] Target b2xx_b200_fpga_default is up to date.
[INFO] Target usrp2_n200_fpga_default is up to date.
[INFO] Target e3xx_e320_fpga_default is up to date.
[INFO] Target n3xx_n310_fpga_default is up to date.
[INFO] Target b2xx_b205mini_fpga_default is up to date.
[INFO] Target x3xx_x300_fpga_default is up to date.
[INFO] Target octoclock_octoclock_fw_default is up to date.
[INFO] Target usrp2_usrp2_fw_default is up to date.
[INFO] Target usrp2_n200_fw_default is up to date.
[INFO] Target usrp2_usrp2_fpga_default is up to date.
[INFO] Target b2xx_common_fw_default is up to date.
[INFO] Target n3xx_n320_fpga_default is up to date.
[INFO] Target b2xx_b200mini_fpga_default is up to date.
[INFO] Target usrp1_usrp1_fpga_default is up to date.
[INFO] Target usb_common_windrv_default is up to date.
[INFO] Target usrp2_n210_fw_default is up to date.
[INFO] Target n3xx_n300_fpga_default is up to date.
[INFO] Target e3xx_e310_fpga_default is up to date.
[INFO] Target b2xx_b210_fpga_default is up to date.

uhd_find_devices --args addr=192.168.50.2
[INFO] [UHD] linux; GNU C++ version 7.4.0; Boost_106501;
UHD_3.14.0.HEAD-0-g6875d061
--------------------------------------------------
-- UHD Device 0
--------------------------------------------------
Device Address:
    serial: 30CBE93
    addr: 192.168.50.2
    fpga: HG
    name:
    product: X310
    type: x300

uhd_usrp_probe --args addr=192.168.50.2
[INFO] [UHD] linux; GNU C++ version 7.4.0; Boost_106501;
UHD_3.14.0.HEAD-0-g6875d061
[INFO] [X300] X300 initialization sequence...
[INFO] [X300] Maximum frame size: 1472 bytes.
[INFO] [X300] Radio 1x clock: 200 MHz
[INFO] [GPS] Found an internal GPSDO: LC_XO, Firmware Rev 0.929a
[INFO] [0/DmaFIFO_0] Initializing block control (NOC ID: 0xF1F0D00000000000)
[INFO] [0/DmaFIFO_0] BIST passed (Throughput: 1293 MB/s)
[INFO] [0/DmaFIFO_0] BIST passed (Throughput: 1318 MB/s)
[INFO] [0/Radio_0] Initializing block control (NOC ID: 0x12AD100000000001)
[INFO] [0/Radio_1] Initializing block control (NOC ID: 0x12AD100000000001)
[INFO] [0/DDC_0] Initializing block control (NOC ID: 0xDDC0000000000000)
[INFO] [0/DDC_1] Initializing block control (NOC ID: 0xDDC0000000000000)
[INFO] [0/DUC_0] Initializing block control (NOC ID: 0xD0C0000000000000)
[INFO] [0/DUC_1] Initializing block control (NOC ID: 0xD0C0000000000000)
  _____________________________________________________
 /
|       Device: X-Series Device
|     _____________________________________________________
|    /
|   |       Mboard: X310
|   |   revision: 8
|   |   revision_compat: 7
|   |   product: 30818
|   |   mac-addr0: 00:80:2f:23:d2:4d
|   |   mac-addr1: 00:80:2f:23:d2:4e
|   |   gateway: 192.168.10.1
|   |   ip-addr0: 192.168.50.2
|   |   subnet0: 255.255.255.0
|   |   ip-addr1: 192.168.60.2
|   |   subnet1: 255.255.255.0
|   |   ip-addr2: 192.168.70.2
|   |   subnet2: 255.255.255.0
|   |   ip-addr3: 192.168.80.2
|   |   subnet3: 255.255.255.0
|   |   serial: 30CBE93
|   |   FW Version: 6.0
|   |   FPGA Version: 35.1
|   |   FPGA git hash: 4c165a5
|   |   RFNoC capable: Yes
|   |
|   |   Time sources:  internal, external, gpsdo
|   |   Clock sources: internal, external, gpsdo
|   |   Sensors: gps_gpgga, gps_gprmc, gps_time, gps_locked, gps_servo,
ref_locked
|   |     _____________________________________________________
|   |    /
|   |   |       RX Dboard: A
|   |   |   ID: UBX-160 v1 (0x007a)
|   |   |   Serial: 30CF8F2
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       RX Frontend: 0
|   |   |   |   Name: UBX RX
|   |   |   |   Antennas: TX/RX, RX2, CAL
|   |   |   |   Sensors: lo_locked
|   |   |   |   Freq range: 10.000 to 6000.000 MHz
|   |   |   |   Gain range PGA0: 0.0 to 31.5 step 0.5 dB
|   |   |   |   Bandwidth range: 160000000.0 to 160000000.0 step 0.0 Hz
|   |   |   |   Connection Type: IQ
|   |   |   |   Uses LO offset: No
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       RX Codec: A
|   |   |   |   Name: ads62p48
|   |   |   |   Gain range digital: 0.0 to 6.0 step 0.5 dB
|   |     _____________________________________________________
|   |    /
|   |   |       RX Dboard: B
|   |   |   ID: UBX-160 v1 (0x007a)
|   |   |   Serial: 30BA660
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       RX Frontend: 0
|   |   |   |   Name: UBX RX
|   |   |   |   Antennas: TX/RX, RX2, CAL
|   |   |   |   Sensors: lo_locked
|   |   |   |   Freq range: 10.000 to 6000.000 MHz
|   |   |   |   Gain range PGA0: 0.0 to 31.5 step 0.5 dB
|   |   |   |   Bandwidth range: 160000000.0 to 160000000.0 step 0.0 Hz
|   |   |   |   Connection Type: IQ
|   |   |   |   Uses LO offset: No
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       RX Codec: B
|   |   |   |   Name: ads62p48
|   |   |   |   Gain range digital: 0.0 to 6.0 step 0.5 dB
|   |     _____________________________________________________
|   |    /
|   |   |       TX Dboard: A
|   |   |   ID: UBX-160 v1 (0x0079)
|   |   |   Serial: 30CF8F2
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       TX Frontend: 0
|   |   |   |   Name: UBX TX
|   |   |   |   Antennas: TX/RX, CAL
|   |   |   |   Sensors: lo_locked
|   |   |   |   Freq range: 10.000 to 6000.000 MHz
|   |   |   |   Gain range PGA0: 0.0 to 31.5 step 0.5 dB
|   |   |   |   Bandwidth range: 160000000.0 to 160000000.0 step 0.0 Hz
|   |   |   |   Connection Type: QI
|   |   |   |   Uses LO offset: No
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       TX Codec: A
|   |   |   |   Name: ad9146
|   |   |   |   Gain Elements: None
|   |     _____________________________________________________
|   |    /
|   |   |       TX Dboard: B
|   |   |   ID: UBX-160 v1 (0x0079)
|   |   |   Serial: 30BA660
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       TX Frontend: 0
|   |   |   |   Name: UBX TX
|   |   |   |   Antennas: TX/RX, CAL
|   |   |   |   Sensors: lo_locked
|   |   |   |   Freq range: 10.000 to 6000.000 MHz
|   |   |   |   Gain range PGA0: 0.0 to 31.5 step 0.5 dB
|   |   |   |   Bandwidth range: 160000000.0 to 160000000.0 step 0.0 Hz
|   |   |   |   Connection Type: QI
|   |   |   |   Uses LO offset: No
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       TX Codec: B
|   |   |   |   Name: ad9146
|   |   |   |   Gain Elements: None
|   |     _____________________________________________________
|   |    /
|   |   |       RFNoC blocks on this device:
|   |   |
|   |   |   * DmaFIFO_0
|   |   |   * Radio_0
|   |   |   * Radio_1
|   |   |   * DDC_0
|   |   |   * DDC_1
|   |   |   * DUC_0
|   |   |   * DUC_1
Thanks and Regards,
Manu
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