You can convert your .bit file to a .bin file with this utility: https://github.com/EttusResearch/uhd/blob/UHD-3.14/mpm/python/usrp_mpm/fpga_bit_to_bin.py
On Mon, Oct 7, 2019 at 12:02 PM Marcus D. Leech via USRP-users < [email protected]> wrote: > On 10/07/2019 11:19 AM, Francesco Restuccia via USRP-users wrote: > > Hi all, > > > > I've built an N210 image using the source code provided by Ettus-- > > > > When I try to burn the FPGA image onto the N210, though, I receive the > > following error: > > > > frank@frank-iMac:~$ uhd_image_loader > > --args="type=usrp2,addr=192.168.10.2" --no-fw > > --fpga-path=/home/frank/u2plus.bit > > [INFO] [UHD] linux; GNU C++ version 8.3.0; Boost_106700; > > UHD_3.15.0.git-74-g9ea710b1 > > Unit: USRP N210 r4 (F2E28F, 192.168.10.2) > > Error: RuntimeError: The file at path "/home/frank/u2plus.bit" is not > > a valid FPGA image. > > frank@frank-iMac:~$ > > > > This is the size of the image: > > > > frank@frank-iMac:~$ ls -la /home/frank/u2plus.bit > > -rw-r--r-- 1 frank frank 1303318 Oct 7 11:07 /home/frank/u2plus.bit > > frank@frank-iMac:~$ > > > > Again, no modifications to the Verilog designs -- everything, > > including makefile, is out of the box. > > > > Any suggestion? > > > > Thanks, > > > > Francesco > > > You must use the .bin file uhd_image_loader > > > > > _______________________________________________ > USRP-users mailing list > [email protected] > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >
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