Ishai, it's a bit hard to tell from this snippet, since we're missing the definitions of random_word and s. Which one is wrong, is it random_word, or readback?
-- M On Thu, Oct 3, 2019 at 12:56 AM ishai alouche via USRP-users < [email protected]> wrote: > Hi, > > I work with X310 and I try to write to user register and read to verify > that the value was update. > > I change the code like in the instruction at the following website: > https://kb.ettus.com/Getting_Started_with_RFNoC_Development > > The relevant code from the test-bench is: > > > > > > > > > * /******************************************************** ** Test > 4 -- Write / readback user registers > ********************************************************/ > `TEST_CASE_START("Write / readback user registers"); random_word = 5; // > $random(); tb_streamer.write_user_reg(sid_noc_block_TxChannelSrc, > noc_block_TxChannelSrc.SR_MIN_BW, random_word[21:0]); > tb_streamer.read_user_reg(sid_noc_block_TxChannelSrc, 0, readback); > `ASSERT_ERROR(readback[21:0] == random_word[21:0], s);* > > The relevant code from the noc block is: > > * localparam SR_USER_REG_BASE = 128;* > > * localparam [7:0] SR_MIN_BW = SR_USER_REG_BASE;* > > * wire [21:0] min_BW;* > > > > > > > * setting_reg #( .my_addr(SR_MIN_BW), .awidth(8), .width(22)) > sr_min_BW ( .clk(ce_clk), .rst(ce_rst), .strobe(set_stb), > .addr(set_addr), .in(set_data), .out(min_BW), .changed()); * > > > > > > > > > > * always @(posedge ce_clk) begin case(rb_addr) 8'd0 : rb_data <= > {42'd0, min_BW}; 8'd1 : rb_data <= {42'd0, max_BW}; 8'd2 : > rb_data <= {42'd0, BW_change_rate}; 8'd3 : rb_data <= {48'd0, > payload_length}; default : rb_data <= 64'h0BADC0DE0BADC0DE; > endcase end* > > when i run the make command with the noc_block_TxChannelSrc_tb , I get the > following warning: > > > > > > > > > *WARNING: [XSIM 43-3431] One or more environment variables have been > detected which affect the operation of the C compiler. These are typically > not set in standard installations and are not tested by Xilinx, however > they may be appropriate for your system, so the flow will attempt to > continue. If errors occur, try running fuse with the "-mt off -v 1" > switches to see more information from the C compiler. The following > environment variables have been detected: LIBRARY_PATHStarting static > elaborationWARNING: [VRFC 10-278] actual bit length 3 differs from formal > bit length 4 for port rb_addr > [/home/user/rfnoc_01/rfnoc-modules/rfnoc/testbenches/noc_block_TxChannelSrc_tb/noc_block_TxChannelSrc_tb.sv:35]WARNING: > [VRFC 10-278] actual bit length 4 differs from formal bit length 2 for port > dest > [/home/user/rfnoc_01/src/uhd-fpga/usrp3/lib/rfnoc/noc_shell.v:230]WARNING: > [VRFC 10-278] actual bit length 4 differs from formal bit length 2 for port > dest > [/home/user/rfnoc_01/src/uhd-fpga/usrp3/lib/rfnoc/noc_block_export_io.v:183]WARNING: > [VRFC 10-526] concatenation with unsized literal; will interpret as 32 bits > [/home/user/rfnoc_01/rfnoc-modules/rfnoc/testbenches/noc_block_TxChannelSrc_tb/noc_block_TxChannelSrc_tb.sv:75]WARNING: > [VRFC 10-526] concatenation with unsized literal; will interpret as 32 bits > [/home/user/rfnoc_01/rfnoc-modules/rfnoc/testbenches/noc_block_TxChannelSrc_tb/noc_block_TxChannelSrc_tb.sv:76]WARNING: > [VRFC 10-1783] select index -1 into value is out of bounds > [/home/user/rfnoc_01/src/uhd-fpga/usrp3/lib/control/synchronizer_impl.v:38]* > > The test don't stop to run, and when I get the test results the same value > is always read. > > > > > > > > > > > > > > > *========================================================TESTBENCH > STARTED: > noc_block_TxChannelSrc========================================================[TEST > CASE 1] (t=000000000) BEGIN: Wait for Reset...[TEST CASE 1] > (t=000001002) DONE... Passed[TEST CASE 2] (t=000001002) BEGIN: Check NoC > ID...Read TxChannelSrc NOC ID: 1111222233334444[TEST CASE 2] > (t=000001238) DONE... Passed[TEST CASE 3] (t=000001238) BEGIN: Connect > RFNoC blocks...Connecting noc_block_tb (SID: 1:0) to noc_block_TxChannelSrc > (SID: 0:0)Connecting noc_block_TxChannelSrc (SID: 0:0) to noc_block_tb > (SID: 1:0)[TEST CASE 3] (t=000006075) DONE... Passed[TEST CASE 4] > (t=000006075) BEGIN: Write / readback user registers...Error: User register > 0 incorrect readback! Expected: 3359812, Actual 5Time: 6602500 ps > Iteration: 0 Process: /noc_block_TxChannelSrc_tb/Initial43_1195 File: > /home/user/rfnoc_01/rfnoc-modules/rfnoc/testbenches/noc_block_TxChannelSrc_tb/noc_block_TxChannelSrc_tb.sv* > > please someone can explain me what is wrong here. > > BR > Ishai > > -- > ישי אלוש > 054-5823400 > _______________________________________________ > USRP-users mailing list > [email protected] > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >
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