I am getting the same error as Pratik: http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/2018-September/057930.html
When I run the testbench, it is gets stuck on TEST CASE 5. I have used rfnocmodtool to create the tutorial and added a gain block. I have downloaded the files directly from the tutorial website into the proper places in the gain block: https://kb.ettus.com/images/a/ab/gain_src.tar.gz I'm using branch UHD-3.15.LTS I am also not using the PyBOMBS methods so when I build, I use: cmake -DUHD_FPGA_DIR=[UHD source directory]/fpga-src/ ../ Jeff
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