Try this patch file. I received from Ettus a long time ago (Oct 2019?) but
it appears that it is still not fixed.
Rob
On Tue, Jul 28, 2020 at 6:27 AM Jorge Arroyo Giganto via USRP-users <
[email protected]> wrote:
> Hi,
>
>
> I’m working on getting a solid workflow to build and use RFNoC blocks. I’m
> using branches UHD-3.15.LTS and GNU Radio’s maint-3.7 (also, packet
> gr-ettus from the master branch and uhd-fpga from the UHD-3.15.LTS branch).
> I’m using an E310 (SG1), with the SD image I get with
> ‘uhd_images_downloader -t e310 -t sdimg’ (usrp_e310_fs.sdimg). Also, I’m
> running Ubuntu 18.04 and I’ve got Vivado 2018.3 installed.
>
> A couple of weeks ago I started trying to follow the ‘Getting Started with
> RFNoC Development’ guide, and tried using rfnoc-devel and master branches,
> but it seems like this UHD-3.15.LTS is the one working the best for me, but
> I still have some issues.
>
> Following the guide, I built a custom block (gain), which I was able to
> get through the testbench (after quite a bit of attempts), but when trying
> to generate a bitstream (.bit file) with my gain block I got the following
> errors:
>
>
> ~/rfnoc_UHD315/src/uhd-fpga/usrp3/tools/scripts$
> ./uhd_image_builder.py gain fft -I ~/rfnoc_UHD315/src/rfnoc-tutorial/ -d
> e31x -t E310_RFNOC -m 4 –fill-with-fifos
>
> .
>
> .
>
> .
>
> ERROR: [Synth 8-439] module 'noc_block_gain' not found
> [/home/jarroyo/rfnoc_UHD315/
> src/uhd-fpga/usrp3/top/e31x/rfnoc_ce_auto_inst_e31x.v:20]
>
> ERROR: [Synth 8-6156] failed synthesizing module 'e31x_core'
> [/home/jarroyo/rfnoc_UHD315/src/uhd-fpga/usrp3/top/e31x/e31x_core.v:17]
>
> ERROR: [Synth 8-6156] failed synthesizing module 'e31x'
> [/home/jarroyo/rfnoc_UHD315/src/uhd-fpga/usrp3/top/e31x/e31x.v:13]
>
> [00:01:46] Current task: Synthesis +++ Current Phase: Starting
>
> ERROR: [Common 17-69] Command failed: Synthesis failed - please see
> the console or run log file for details
>
> [00:01:46] Current task: Synthesis +++ Current Phase: Finished
>
> [00:01:46] Process terminated. Status: Failure
>
>
> If it is useful information, I was able to successfully generate a
> bitstream with existing RFNoC blocks (‘./uhd_image_builder.py window fft -d
> e31x -t E310_RFNOC -m 3 –fill-with-fifos’ for example, is working), so
> that’s why I guess my main issue is with the gain custom block.
>
>
> Also, another issue I’m having is using uhd_image_loader on the E310
> terminal when loading my own bitstreams:
>
>
> root@ni-e31x:~# uhd_image_loader
> --args="type=e3xx,addr=192.168.10.2" --fpga-path
> /usr/share/uhd/images/e31x.bit
>
> [INFO] [UHD] linux; GNU C++ version 8.2.0; Boost_106800;
> UHD_3.15.0.0-0-gaea0e2de
>
> No applicable UHD devices found
>
>
> Is there anything I might be doing wrong? Or is this workflow with these
> branches and tool versions not the most appropiate currently?
>
>
> Thanks in advance,
>
>
> Jorge
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
diff --git a/usrp3/tools/scripts/uhd_image_builder.py b/usrp3/tools/scripts/uhd_image_builder.py
index 23bfa2d9..1587dd25 100755
--- a/usrp3/tools/scripts/uhd_image_builder.py
+++ b/usrp3/tools/scripts/uhd_image_builder.py
@@ -303,24 +303,18 @@ def create_oot_include(device, include_dirs):
currpath = os.path.abspath(str(dirs))
if os.path.isdir(currpath) & (os.path.basename(currpath) == "rfnoc"):
# Case 1: Pointed directly to rfnoc directory
- oot_path = currpath
+ oot_path = os.path.dirname(currpath)
elif os.path.isdir(os.path.join(currpath, 'rfnoc')):
# Case 2: Pointed to top level rfnoc module directory
- oot_path = os.path.join(currpath, 'rfnoc')
- elif os.path.isfile(os.path.join(currpath, 'Makefile.inc')):
- # Case 3: Pointed to a random directory with a Makefile.inc
oot_path = currpath
else:
print('No RFNoC module found at ' + os.path.abspath(currpath))
continue
if oot_path not in oot_dir_list:
oot_dir_list.append(oot_path)
- named_path = os.path.join('$(BASE_DIR)', get_relative_path(get_basedir(), oot_path))
+ named_path = os.path.join('$(BASE_DIR)', get_relative_path(get_basedir(), oot_path), 'rfnoc')
incfile.write(OOT_DIR_TMPL.format(oot_dir=named_path))
- if os.path.isfile(os.path.join(oot_path, 'Makefile.inc')):
- # Check for Makefile.inc
- incfile.write(OOT_INC_TMPL)
- elif os.path.isfile(os.path.join(oot_path, 'rfnoc', 'Makefile.inc')):
+ if os.path.isfile(os.path.join(oot_path, 'rfnoc', 'Makefile.inc')):
# Check for Makefile.inc
incfile.write(OOT_INC_TMPL)
elif os.path.isfile(os.path.join(oot_path, 'rfnoc', 'fpga-src', 'Makefile.srcs')):
@@ -446,8 +440,7 @@ def device_dict(args):
'e310':'e300',
'e320':'e320',
'n300':'n3xx',
- 'n310':'n3xx',
- 'n320':'n3xx'
+ 'n310':'n3xx'
}
return build_dir[args]
diff --git a/usrp3/top/n3xx/Makefile.n3xx.inc b/usrp3/top/n3xx/Makefile.n3xx.inc
index 9a8e9ec1..ddfa6e5a 100644
--- a/usrp3/top/n3xx/Makefile.n3xx.inc
+++ b/usrp3/top/n3xx/Makefile.n3xx.inc
@@ -36,8 +36,8 @@ include $(LIB_DIR)/axi/Makefile.srcs
include $(LIB_DIR)/radio/Makefile.srcs
include $(LIB_DIR)/white_rabbit/wr_cores_v4_2/Makefile.srcs
include $(LIB_DIR)/rfnoc/Makefile.srcs
-include $(BASE_DIR)/n3xx/Makefile.OOT.inc
include $(BASE_DIR)/n3xx/Makefile.srcs
+include $(BASE_DIR)/n3xx/Makefile.OOT.inc
include $(BASE_DIR)/n3xx/dboards/rh/Makefile.srcs
include $(BASE_DIR)/n3xx/dboards/mg/Makefile.srcs
include $(BASE_DIR)/n3xx/dboards/eiscat/Makefile.srcs
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