I have never used Aurora, and I know of no examples/writeups/tutorials of USRPs and Aurora in action.
Supposedly some of the USRP have built-in self tests (BIST) that use Aurora ... but that's just on the USRP itself; no actual data links I believe. A quick internet search turned up this < https://github.com/NISystemsEngineering/USRP-Streaming-Examples >, which uses X310 + daughterboards along with NI PXIe devices to receive Aurora-based data. Aurora was also used in the DARPA Colosseum; I don't know if they have ever released examples/writeups/tutorials that would be useful in this regard. It's a cool feature that I'd love to see in use more (same as White Rabbit) ... but how to use it is a good question! Hopefully others who do have Aurora experience can chime in! - MLD On Wed, Jun 9, 2021 at 10:05 AM Paul Atreides <[email protected]> wrote: > I’m digging into this myself now Using X310s. Yes, Aurora is an FPGA to > FPGA interface Created by Xilinx. Ettus has HA and XA images for the X > series and I believe AA and something else for N3xx series. Ettus also has > an aurora BIST python script for X310 in the firmware directory of UHD. It > took forever to find this, but it’s very useful. I’m sure there’s some > equivalent for N3xx too, but I haven’t looked. The script basically just > confirms that the SFP1 ports are setup to communicate properly over Aurora > and is sending data between those two interfaces across 2 devices. In the > “UHD FOUR-O” video from GRCON2019 there is A demo of two X310s passing an > RF stream between them using GNURadio and RFNoC. Other than that, yes it’s > very sparse as far as evidence or examples of how Aurora can be used with > Ettus products. > > Hoping to have some better information to offer here soon, but for now > that’s about all I have. > > Hope this is helpful. > > <end transmission> > > On Jun 9, 2021, at 09:14, Jason Matusiak <[email protected]> > wrote: > > > Thank you for all the info Michael. > > Are you aware of any examples/writeups/tutorials of USRPs and Aurora in > action? I am trying to wrap my head around how it is intended to be used. > It seems like it can only really be used in an FPGA-to-FPGA environment, > but almost everything I find in Ettus documentation is just that certain > devices are Aurora capable, and not much else to go on. TIA. > > ------------------------------ > *From:* Michael Dickens <[email protected]> > *Sent:* Friday, June 4, 2021 5:00 PM > *To:* Jason Matusiak <[email protected]> > *Cc:* Ettus Mail List <[email protected]> > *Subject:* Re: [USRP-users] Troubles with the QSFP+ on the N3x0 series > > When using White Rabbit, the WR link does not appear to the OS; WR signal > processing is handled directly in the FPGA, and made available to the OS / > UHD via special commands. Or, that's what's supposed to happen. As of UHD > 3.14.0.0rc1 WR does not work; we just recently found out this fact, and we > are working hard to get the issue(s) resolved. > > I've never used the Aurora FPGA image .. AA or AQ. From < > https://files.ettus.com/manual/page_usrp_n3xx.html#n3xx_rh_sfp_protocols > <https://urldefense.proofpoint.com/v2/url?u=https-3A__files.ettus.com_manual_page-5Fusrp-5Fn3xx.html-23n3xx-5Frh-5Fsfp-5Fprotocols&d=DwMFaQ&c=euGZstcaTDllvimEN8b7jXrwqOf-v5A_CdpgnVfiiMM&r=W_MQLyUWPXWHfsF4mr51mTMqpeO4RbBBLexficV9DG8&m=ENRZJm0dongj94OSx26akoZ47ZDgZyJD7Vw1ImyuPXk&s=Zl6FEDU7AJWOGXHESoUNB4E4yyfYiMqxrShWRYTVIq8&e=> > > it looks like AQ uses all 4 QSFP+ lanes, which between the actual Aurora > protocol and using all 4 10 Gb lanes one should be able to get 40 Gb > aggregate data ... literally bits in, bits out ... no ENET overhead! > > > On Fri, Jun 4, 2021 at 4:43 PM Jason Matusiak < > [email protected]> wrote: > > Afternoon Michael! This is exactly the info I needed. I misspoke when I > said WX, I meant XQ. > > After putting the new image on, we knew the /data/ directory still had the > two sfp network setups, but we were expecting something in addition for the > qsfp. It makes sense that it doesn't //need// to change since we are only > using 2 lanes of one, or 2 lanes of the other. BUT, what I couldn't be 100% > sure of is since white rabbit needs Ethernet as well, why wouldn't THAT be > the sfp0 configuration, make sense? I'm not working the white rabbit side, > but I understand it to be ip based. > > Lastly. If we go the pure Aurora route, I know that we lose white rabbit, > but we gain a full 40Gbps, right? > > Thanks again. > On Jun 4, 2021, at 4:18 PM, Michael Dickens <[email protected]> > wrote: > > Hi Jason - Answers, and more. I hope this is useful and helps clarify the > options. - MLD > > 1) The N32x QSFP+ port/link/interface should work with UHD 3.15 via the XQ > FPGA image. I haven't tried that in a while, but it did work for me once > upon a time. > > 2) When using the WX FPGA image on any N3xy, you get just SFP+ port 1 for > data, which is just a single 10 Gb link -- not the QSFP+ port (which is on > the N32x only, by the way). If you use the XQ FPGA image with the N32x then > you get 1x or 2x 10 Gb links via the QSFP+ port: lanes 0 and 1 (or 1 and 2 > if you count lanes as 1's-based). In theory you could use 2x SFP+ 10 Gb > links on a host NIC and aggregate them via fiber into a QSFP+ adapter > attached to the USRP; I've never tried this directly, but I can say that > taking QSFP+ off a host NIC and switching lanes works fine using the > appropriate adapters and fiber cables and connectors. Just make sure that > lanes 0 &/or 1 on the USRP side match up correctly with the other side > coming in (whatever lane[s] you choose to use, so long as it/they are valid > on the NIC). > > 3) When using the WX FPGA image with an N3xy, "ifconfig" will report back > just "sfp1" as the 10 Gb data link that is connected to SFP+ port 1 on the > USRP; not the QSFP+ port (which is, again, on just the N32x); this single > link is set that up as you would any data link on a USRP and host. If you > use the XQ FPGA image with an N32x, "ifconfig" will report back "sfp0" and > "sfp1" as the 2 10 Gb data links, and you set those up just as you would if > you were using the XG FPGA image. The FPGA maps between the data link (SFP+ > or QSFP+) and the OS, so that the OS "sees" 1 or 2 10 Gb links; or that's > how I understand this to work ... the end result is the same regardless of > where the mapping happens :) > > > On Fri, Jun 4, 2021 at 2:26 PM Jason Matusiak < > [email protected]> wrote: > > I have been away from USRPs for a while but am back to using some N3x0 > units and am having some issues. > > 1 - Does QSFP work with UHD 3.15? We'd prefer not to go up to v4 yet due > to some issues we've seen in testing it, but I am not sure how well > supported QSFP is on 3.15. > > 2 - When using the QSFP with White Rabbit (WX image), is it correct to say > that the QSFP link is really x2 10Gb links, not a single 20Gb? Meaning > that we would need a 40Gb QSFP that can handle 4 10G outputs, correct? > > 3 - Lastly, I cannot find any documentation on setting up the QSFP. I've > downloaded a new WX image over Mender, but I don't see where/how to > configure the QSFP. Is there an article or writeup anywhere that walks > through the steps? > > Thank you > _______________________________________________ > USRP-users mailing list -- [email protected] > To unsubscribe send an email to [email protected] > > _______________________________________________ > USRP-users mailing list -- [email protected] > To unsubscribe send an email to [email protected] > >
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