On 08/02/2021 01:12 AM, Daniel Ozer wrote:
Hi,
Its been a while that I'm using the usrp x310 with twinRx and i have
some question on it :
1. Is it possible to use the 184.32M clock in the system while using
the twinRx that required 200M clock? (I have no problem to change the
bitfile)
That would require hardware changes to the TwinRX board as far as I know.
2.DDC and DUC (ettus rfnoc blocks): where i can find the spec of each
block ?
In terms of a breezy English-language description, like an API
specification? I don't think there are any. Refer to the source code.
+ Is it possible to do a fractional decimation with the DDC?
Not with the as-supplied DDC. But there are likely others on this list
who have implemented fractional decimation in RFNOC and may be willing
to share
their wisdom.
3. While using high sample rate 50M+ i saw that once in a while 'D'
is written to the terminal . How can get an interrupt that indicates
that a packet has lost ? Is it one packet every time or only some of
the packet not arriving ? Is there a way to make sure that packets
won't lost ?
The recv() call returns metadata that includes an error code. See:
https://files.ettus.com/manual/structuhd_1_1rx__metadata__t.html
Packets get lost because your network-hardware/cpu/kernel stack cannot
"keep up". What type of network interface are you using? If you are using
a 10G card that supports DPDK, you might investigate DPDK on your system.
https://files.ettus.com/manual/page_dpdk.html
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