I'm sorry to hear it's still not working for you. Can you try a clean repo and use the unmodified example from the repo? If that works then you could compare your copy to the example to see what's different.
The way the build-process works with OOT modules is that rfnoc_image_builder looks for the Makefile.srcs for your OOT module, which, in the example, includes the Makefile.srcs for the gain block. The HDL files get added to a variable named RFNOC_OOT_SRCS. So it could be one of these files has a mistake in your OOT module: https://github.com/EttusResearch/uhd/blob/master/host/examples/rfnoc-example/fpga/Makefile.srcs https://github.com/EttusResearch/uhd/blob/master/host/examples/rfnoc-example/fpga/rfnoc_block_gain/Makefile.srcs Or it could be that the path provided to rfnoc_image_builder is not correct, which would prevent it from finding the Makefile.srcs. It did look like the path was incorrect in one of your other email threads. If nothing else works, you can modify the Makefile.inc for X300 and add the missing files directly. https://github.com/EttusResearch/uhd/blob/master/fpga/usrp3/top/x300/Makefile.x300.inc Thanks, Wade On Fri, Feb 11, 2022 at 10:47 PM sp h <[email protected]> wrote: > Thanks, I checked your guidance. I am sure that everything is true but I > faced past errors: > module 'rfnoc_block_gain' not found.... > > On Wed, Feb 9, 2022 at 10:52 PM Wade Fife <[email protected]> wrote: > >> That error means the source code for your gain block wasn't included. My >> guess is that the include path was wrong, so your Makefile.srcs wasn't >> added. If you're coping the rfnoc-example, here's how to build it (I've >> attempted to use your file paths in this example): >> >> cd /home/sp/Documents/rfnoc-tutorial >> mkdir build >> cd build >> cmake -DUHD_FPGA_DIR=/home/sp/Documents/uhd-4.1.0.5/fpga ../ >> make x310_rfnoc_image_core >> >> If you want to build without using cmake, you could do this: >> >> rfnoc_image_builder -F /home/sp/Documents/uhd-4.1.0.5/fpga -I >> /home/sp/Documents/rfnoc-tutorial -p /home/sp/xilinx/Vivado -y >> /home/sp/Documents/rfnoc-tutorial/rfnoc/icores/x310_rfnoc_image_core.yml >> >> Note the include path is the base of the OOT module. Please check that >> all the paths are correct for your setup when trying. >> >> Wade >> >> >> On Tue, Feb 8, 2022 at 1:35 AM sp h <[email protected]> wrote: >> >>> I copied RFNOC gain example from UHD folder, I installed it >>> successfully in Gnuradio, But for building FPGA >>> I was faced with these errors. >>> How can I solve this problem? >>> >>> Thanks in advance >>> >>> ERROR: [Synth 8-439] module 'rfnoc_block_gain' not found >>> [/home/sp/Documents/rfnoc-tutorial/rfnoc/icores/x310_rfnoc_image_core.v:1055] >>> ERROR: [Synth 8-6156] failed synthesizing module 'rfnoc_image_core' >>> [/home/sp/Documents/rfnoc-tutorial/rfnoc/icores/x310_rfnoc_image_core.v:24] >>> ERROR: [Synth 8-6156] failed synthesizing module 'bus_int' >>> [/home/sp/Documents/uhd-4.1.0.5/fpga/usrp3/top/x300/bus_int.v:9] >>> ERROR: [Synth 8-6156] failed synthesizing module 'x300_core' >>> [/home/sp/Documents/uhd-4.1.0.5/fpga/usrp3/top/x300/x300_core.v:9] >>> ERROR: [Synth 8-6156] failed synthesizing module 'x300' >>> [/home/sp/Documents/uhd-4.1.0.5/fpga/usrp3/top/x300/x300.v:20] >>> ERROR: [Common 17-69] Command failed: Synthesis failed - please see the >>> console or run log file for details >>> [00:04:05] Current task: Synthesis +++ Current Phase: Starting >>> [00:04:05] Current task: Synthesis +++ Current Phase: Finished >>> [00:04:05] Process terminated. Status: Failure >>> _______________________________________________ >>> USRP-users mailing list -- [email protected] >>> To unsubscribe send an email to [email protected] >>> >>
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