Update,
I found an error in my wiring and now shorting a data pin and GPIO GND makes
the bit flip from 1 to 0.
Still sounds like a weird behavior for a floating pin to be stuck at 1 but
that's not an issue for me.
Moving from the example to a C++ RFNOC code I'm developing I encountered a
different problem.
The same code does not see the changes to the pin anymore (I checked back and
forth with the example. The example works, the rfnoc code does not).
Specifically I'm setting the GPIO registers with this function:
void set_GPIO_all_readback_rfnoc(uhd::rfnoc::mb_controller::sptr mb_controller,
uhd::rfnoc::radio_control::sptr radio_block)
{
std::vector<std::string> source = mb_controller->get_gpio_src("FP0"); //*
std::cout<<"GPIO source: "<< source[0] <<std::endl;
std::cout << "Available GPIO banks: " << std::endl;
auto banks = radio_block->get_gpio_banks();
for (auto& bank : banks) {
std::cout << "* " << bank << std::endl;
}
std::string gpio = "FP0";
std::string port = "";
size_t num_bits = 11;
std::cout<<"Using GPIO bank: "<<gpio<<std::endl;
uint32_t value = 0x0;
radio_block->set_gpio_attr(gpio, "CTRL", value);
radio_block->set_gpio_attr(gpio, "DDR", value);
radio_block->set_gpio_attr(gpio, "OUT", value);
radio_block->set_gpio_attr(gpio, "ATR_0X", value);
radio_block->set_gpio_attr(gpio, "ATR_RX", value);
radio_block->set_gpio_attr(gpio, "ATR_TX", value);
radio_block->set_gpio_attr(gpio, "ATR_XX", value);
output_reg_values(gpio, port, radio_block, num_bits);
}
Where mb_controller is derived by graph->get_mb_controller(0); and radio_block
is the radio control of the radio I'm using.
The output of output_reg_values are identical in the two cases:
Configured GPIO values:
Bit: 10 9 8 7 6 5 4 3 2 1 0
CTRL: 0 0 0 0 0 0 0 0 0 0 0
DDR: 0 0 0 0 0 0 0 0 0 0 0
ATR_0X: 0 0 0 0 0 0 0 0 0 0 0
ATR_RX: 0 0 0 0 0 0 0 0 0 0 0
ATR_TX: 0 0 0 0 0 0 0 0 0 0 0
ATR_XX: 0 0 0 0 0 0 0 0 0 0 0
OUT: 0 0 0 0 0 0 0 0 0 0 0
READBACK: 1 1 1 1 1 1 1 1 1 1 1
SRC: RF0 RF0 RF0 RF0 RF0 RF0 RF0 RF0 RF0 RF0 RF0 RF0 (*I have to query
the motherboard controller in rfnoc to get this line)
The results (shorting the GPIO pin and the GPIO GND) are different. Running:
rb = radio_block->get_gpio_attr("FP0", "READBACK");
std::cout << "\rREADBACK: " << to_bit_string(rb, 11);
gives me: READBACK: 1 1 1 1 1 1 1 1 1 1
while in the GPIO example from UHD, running:
rb = usrp->get_gpio_attr(gpio, "READBACK");
std::cout << "\rREADBACK: " << to_bit_string(rb, num_bits);
gives me: READBACK: 1 1 1 1 0 1 1 1 1 1 1
Am I using the rfnoc GPIO api in a wrong way? Why are these two outputs
different?
Thanks,
Lorenzo
________________________________
From: Minutolo, Lorenzo <minut...@caltech.edu>
Sent: Thursday, June 9, 2022 2:48 PM
To: usrp-users@lists.ettus.com <usrp-users@lists.ettus.com>
Subject: [USRP-users] N321 GPIO
Hi All,
I'm trying to use the internal GPIO connector of an N321 to read an external
digital signal.
Cabling: after looking at the N321 schematic, I found that the GPIO connector
on the board mates with a Molex duo-clasp connector, 20 contacts, 2 rows. After
buying the casing and the pins I patched up a cable exposing all 20 pins. Is
anyone aware of a better option to connect to the GPIO interface?
UHD api: running the GPIO example from uhd 4.2 (with no nothing connected to
the GPIO) I get the attached output. The way I interpret this is that all the
registers are reading 1. This seems weird as I would expect the values of
unconnected pins to be 0.
Running the test again with all data pin grounded to the GPIO Vss or connected
to the 3.3V produces the same output.
Is the GPIO interface working at all on the N321?
Thanks,
Lorenzo
$ ~/uhd/host/build/examples$ sudo ./gpio --args="master_clock_rate=200e6"
--bitbang --ddr 0x0 --out 0x0 --repeat
Creating the usrp device with: master_clock_rate=200e6...
[INFO] [UHD] linux; GNU C++ version 7.5.0; Boost_106600; UHD_4.2.0.0-4-g04d14cd7
[INFO] [MPMD] Initializing 1 device(s) in parallel with args:
mgmt_addr=192.168.20.2,type=n3xx,product=n320,serial=<my
serial>,name=ni-n3xx-31CCFB3,fpga=XG,claimed=False,addr=192.168.20.2,master_clock_rate=200e6
[INFO] [MPM.PeriphManager] init() called with device args
`fpga=XG,master_clock_rate=200e6,mgmt_addr=192.168.20.2,name=ni-n3xx-31CCFB3,product=n320,clock_source=internal,time_source=internal'.
[INFO] [MPM.Rhodium-0] init() called with args
`fpga=XG,master_clock_rate=200e6,mgmt_addr=192.168.20.2,name=ni-n3xx-31CCFB3,product=n320,clock_source=internal,time_source=internal'
[INFO] [MPM.Rhodium-1] init() called with args
`fpga=XG,master_clock_rate=200e6,mgmt_addr=192.168.20.2,name=ni-n3xx-31CCFB3,product=n320,clock_source=internal,time_source=internal'
[INFO] [MPM.Rhodium-0.init.LMK04828] LMK initialized and locked!
[INFO] [MPM.Rhodium-1.init.LMK04828] LMK initialized and locked!
[INFO] [MPM.Rhodium-0.DAC37J82] DAC PLL Locked!
[INFO] [MPM.Rhodium-0.AD9695] ADC PLL Locked!
[INFO] [MPM.Rhodium-0.init] JESD204B Link Initialization & Training Complete
[INFO] [MPM.Rhodium-1.DAC37J82] DAC PLL Locked!
[INFO] [MPM.Rhodium-1.AD9695] ADC PLL Locked!
[INFO] [MPM.Rhodium-1.init] JESD204B Link Initialization & Training Complete
Using Device: Single USRP:
Device: N300-Series Device
Mboard 0: n320
RX Channel: 0
RX DSP: 0
RX Dboard: A
RX Subdev: Rhodium
RX Channel: 1
RX DSP: 1
RX Dboard: B
RX Subdev: Rhodium
TX Channel: 0
TX DSP: 0
TX Dboard: A
TX Subdev: Rhodium
TX Channel: 1
TX DSP: 1
TX Dboard: B
TX Subdev: Rhodium
Using GPIO bank: FP0
rx_subdev_spec: A:0 B:0
tx_subdev_spec: A:0 B:0
Initial GPIO values:
Bit: 10 9 8 7 6 5 4 3 2 1 0
CTRL: 0 0 0 0 0 0 0 0 0 0 0
DDR: 1 1 1 1 1 1 1 1 1 1 1
ATR_0X: 0 0 0 0 0 0 0 0 0 0 0
ATR_RX: 0 0 0 0 0 0 0 0 0 0 0
ATR_TX: 0 0 0 0 0 0 0 0 0 0 0
ATR_XX: 0 0 0 0 0 0 0 0 0 0 0
OUT: 0 0 0 0 0 0 0 0 0 0 0
READBACK: 0 0 0 0 0 0 0 0 0 0 0
SRC: RF0 RF0 RF0 RF0 RF0 RF0 RF0 RF0 RF0 RF0 RF0 RF0
Configured GPIO values:
Bit: 10 9 8 7 6 5 4 3 2 1 0
CTRL: 0 0 0 0 0 0 0 0 0 0 0
DDR: 0 0 0 0 0 0 0 0 0 0 0
ATR_0X: 0 0 0 0 0 0 0 0 0 0 0
ATR_RX: 0 0 0 0 0 0 0 0 0 0 0
ATR_TX: 0 0 0 0 0 0 0 0 0 0 0
ATR_XX: 0 0 0 0 0 0 0 0 0 0 0
OUT: 0 0 0 0 0 0 0 0 0 0 0
READBACK: 1 1 1 1 1 1 1 1 1 1 1
SRC: RF0 RF0 RF0 RF0 RF0 RF0 RF0 RF0 RF0 RF0 RF0 RF0
Press Ctrl + C to quit...
READBACK: 1 1 1 1 1 1 1 1 1 1 1
Loop 1 completed
Press Ctrl + C to quit...
READBACK: 1 1 1 1 1 1 1 1 1 1 1
Loop 2 completed
Press Ctrl + C to quit...
READBACK: 1 1 1 1 1 1 1 1 1 1 1
Loop 3 completed
Press Ctrl + C to quit...
READBACK: 1 1 1 1 1 1 1 1 1 1 1
Loop 4 completed
Press Ctrl + C to quit...
READBACK: 1 1 1 1 1 1 1 1 1 1 1
Loop 5 completed
Press Ctrl + C to quit...
READBACK: 1 1 1 1 1 1 1 1 1 1 1
Loop 6 completed
Press Ctrl + C to quit...
READBACK: 1 1 1 1 1 1 1 1 1 1 1
Loop 7 completed
Press Ctrl + C to quit...
READBACK: 1 1 1 1 1 1 1 1 1 1 1 1
Done!
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