On 11/07/2023 11:14, [email protected] wrote:
Hello,
I am curious about the maximum voltage that can be applied to the x4xx
Antenna receive port. On the X410 Getting Started guide, it says
“Never apply more than +14 dBm continuous <=3GHz, +17 dBm continuous
>3GHz, or +20dBm more than 5 minutes >3GHz of power into any RF input.”
And
“Always use at least 30dB attenuation if operating in loopback
configuration”
However, the daughterboard seems to support an adjustable “Gain”.
Is this maximum dBm specs assuming a maximum Gain is used? Is the
maximum voltage that can be supplied determined by the DAC on the FPGA
or a component on the daughterboard.
Thanks
Joe
The maximum input power specification is based on the first RF amplifier
in the receive chain, which is generally *IN FRONT* of
any variable attenuation in that same chain (which is how variable
gain works). The specs are designed to protect that
first amplifier from exceeding its design parameters and being damaged.
When operating in loopback mode, yes, the RF Gain parameter on transmit
varies the output power. But even at the lowest
output setting, the resulting signal, when looped-back, is more than
enough to drive the first receive gain stage into
non-linear operating territory, hence the suggestion for a 30dB
attenuator.
The receive chains on most SDRs are designed for connection to an
over-the-air antenna, where (in lieu of unusual situations),
the expected input power is usually well below -20dBm. The gain
layout is designed to try to optimize both noise figure
and linearity (or at least meet in the middle somewhere), so the
first receive gain stage is nearly always "naked", with
all the gain control occurring after that stage.
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