Hi Muhammad, It says the design doesn't fit in the FPGA. Did you modify the YAML or FPGA code? If so, you may need to reduce what you're including. If not, maybe try building the unmodified FPGA:
cd fpga/usrp3/top/e31x source setupenv.sh make E310_SG3 Thanks, Wade On Tue, Dec 12, 2023 at 9:05 AM Muhammad Hassan <[email protected]> wrote: > Hi everyone, > > I am trying to run this command "rfnoc_image_builder -y > ./e310_rfnoc_image_core.yml". I am getting plenty of warnings and 3 errors. > for complete terminal output I have also attached a file. Can any one help > me resolve this issue? > > The errors are > ERROR: [Place 30-487] The packing of instances into the device could not > be obeyed. There are a total of 13300 slices in the device, of which 9737 > slices are available, however, the unplaced instances require 10808 slices. > Please analyze your design to determine if the number of LUTs, FFs, and/or > control sets can be reduced. > ERROR: [Place 30-99] Placer failed with error: 'Detail Placement failed > please check previous errors for details.' > ERROR: [Common 17-69] Command failed: Placer could not place all instances > [00:13:44] Current task: Placer +++ Current Phase: 3.6 Small Shape Detail > Placement > [00:13:45] Current task: Placer +++ Current Phase: Finished > [00:13:45] Process terminated. Status: Failure > _______________________________________________ > USRP-users mailing list -- [email protected] > To unsubscribe send an email to [email protected] >
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