I’ve resolved this issue. As it turns out, 'spp=1024' is necessary for the
‘RFNoC RX Radio’ block. The correct yml and grc file are attached for reference.
options:
parameters:
alias: ''
author: Grant Meyerhoff <grant.meyerh...@ni.com>
catch_exceptions: 'True'
comment: ''
copyright: ''
description: ''
gen_linking: dynamic
generate_options: qt_gui
generator_class_name: PythonQtGuiGenerator
generator_module: gnuradio.grc.workflows.python_qt_gui
hier_block_src_path: '.:'
id: rfnoc_fosphor
max_nouts: '0'
output_language: python
qt_qss_theme: ''
realtime_scheduling: ''
run: 'True'
run_command: '{python} -u {filename}'
thread_safe_setters: ''
title: 'RFNoC: Fosphor Example'
states:
bus_sink: false
bus_source: false
bus_structure: null
coordinate: [8, 8]
rotation: 0
state: enabled
blocks:
- name: device_type
id: variable
parameters:
comment: ''
value: '"type=x3xx"'
states:
bus_sink: false
bus_source: false
bus_structure: null
coordinate: [288, 152.0]
rotation: 0
state: enabled
- name: fft_size
id: variable
parameters:
comment: ''
value: '1024'
states:
bus_sink: false
bus_source: false
bus_structure: null
coordinate: [328, 12.0]
rotation: 0
state: enabled
- name: fosphor_decim
id: variable
parameters:
comment: ''
value: '201'
states:
bus_sink: false
bus_source: false
bus_structure: null
coordinate: [376, 80.0]
rotation: 0
state: enabled
- name: frame_rate
id: variable
parameters:
comment: ''
value: '30'
states:
bus_sink: false
bus_source: false
bus_structure: null
coordinate: [424, 12.0]
rotation: 0
state: enabled
- name: freq
id: variable_qtgui_range
parameters:
comment: ''
gui_hint: ''
label: Frequency (Hz)
min_len: '200'
orient: QtCore.Qt.Horizontal
rangeType: float
start: 1e6
step: 1e6
stop: 7.2e9
value: 2.4e9
widget: counter_slider
states:
bus_sink: false
bus_source: false
bus_structure: null
coordinate: [736, 12.0]
rotation: 0
state: true
- name: gain
id: variable_qtgui_range
parameters:
comment: ''
gui_hint: ''
label: Gain (dB)
min_len: '200'
orient: QtCore.Qt.Horizontal
rangeType: float
start: '0'
step: '1'
stop: '80'
value: '10'
widget: counter_slider
states:
bus_sink: false
bus_source: false
bus_structure: null
coordinate: [872, 12.0]
rotation: 0
state: true
- name: pwr_bins
id: variable
parameters:
comment: ''
value: '64'
states:
bus_sink: false
bus_source: false
bus_structure: null
coordinate: [272, 76.0]
rotation: 0
state: enabled
- name: samp_rate
id: variable
parameters:
comment: ''
value: int(200e6)
states:
bus_sink: false
bus_source: false
bus_structure: null
coordinate: [232, 12.0]
rotation: 0
state: enabled
- name: uhd_rfnoc_graph
id: uhd_rfnoc_graph
parameters:
alias: ''
clock_source: external
comment: ''
dev_addr: '"addr=192.168.30.2"'
dev_args: ''
num_mboards: '1'
time_source: ''
states:
bus_sink: false
bus_source: false
bus_structure: null
coordinate: [544, 12.0]
rotation: 0
state: true
- name: blocks_message_debug_0
id: blocks_message_debug
parameters:
affinity: ''
alias: ''
comment: ''
en_uvec: 'True'
log_level: info
states:
bus_sink: false
bus_source: false
bus_structure: null
coordinate: [32, 424.0]
rotation: 180
state: enabled
- name: blocks_null_sink_0
id: blocks_null_sink
parameters:
affinity: ''
alias: ''
bus_structure_sink: '[[0,],]'
comment: ''
num_inputs: '2'
type: byte
vlen: fft_size
states:
bus_sink: false
bus_source: false
bus_structure: null
coordinate: [256, 592.0]
rotation: 180
state: disabled
- name: qtgui_fosphor_display_0
id: qtgui_rfnoc_f15_display
parameters:
affinity: ''
alias: ''
center_freq: 2.4e9
comment: ''
fftsize: fft_size
frame_rate: '30'
grid_enabled: 'True'
gui_hint: ''
maxoutbuf: '0'
minoutbuf: '0'
palette: iron
pwr_bins: pwr_bins
samp_rate: samp_rate
wf_enabled: 'True'
wf_lines: '512'
states:
bus_sink: false
bus_source: false
bus_structure: null
coordinate: [288, 356.0]
rotation: 180
state: enabled
- name: uhd_rfnoc_ddc_0
id: uhd_rfnoc_ddc
parameters:
affinity: ''
alias: ''
block_args: ''
comment: ''
device_select: '-1'
freq0: '0'
freq1: '0'
freq2: '0'
freq3: '0'
instance_index: '-1'
maxoutbuf: '0'
minoutbuf: '0'
num_chans: '1'
output_rate0: samp_rate
output_rate1: '0'
output_rate2: '0'
output_rate3: '0'
states:
bus_sink: false
bus_source: false
bus_structure: null
coordinate: [328, 248.0]
rotation: 0
state: true
- name: uhd_rfnoc_fft_0
id: uhd_rfnoc_fft
parameters:
affinity: ''
alias: ''
block_args: ''
comment: ''
device_select: '-1'
fft_direction: FORWARD
fft_length: fft_size
fft_magnitude: COMPLEX
fft_scaling: '1023'
fft_shift_config: NORMAL
instance_index: '-1'
maxoutbuf: '0'
minoutbuf: '0'
num_chans: '1'
states:
bus_sink: false
bus_source: false
bus_structure: null
coordinate: [696, 216.0]
rotation: 0
state: true
- name: uhd_rfnoc_fosphor_0
id: uhd_rfnoc_fosphor
parameters:
affinity: ''
alias: ''
alpha: '65280'
comment: ''
device_select: '-1'
enable_dither: 'True'
enable_noise: 'True'
enable_wf: 'True'
epsilon: '1'
hist_decim: fosphor_decim
instance_index: '-1'
maxoutbuf: '0'
minoutbuf: '0'
offset: '0'
scale: '256'
tdecay: '16384'
trise: '4096'
wf_decim: fosphor_decim
wf_mode: MODE_MAX_HOLD
wf_prediv: RATIO_1_1
states:
bus_sink: false
bus_source: false
bus_structure: null
coordinate: [800, 380.0]
rotation: 180
state: true
- name: uhd_rfnoc_rx_radio_0
id: uhd_rfnoc_rx_radio
parameters:
affinity: ''
alias: ''
antenna0: RX2
antenna1: RX2
antenna2: RX2
antenna3: RX2
bandwidth0: samp_rate
bandwidth1: '0'
bandwidth2: '0'
bandwidth3: '0'
block_args: spp=1024
comment: ''
dc_offset0: 'False'
dc_offset1: 'False'
dc_offset2: 'False'
dc_offset3: 'False'
device_select: '-1'
enable_timestamps0: 'True'
enable_timestamps1: 'True'
enable_timestamps2: 'True'
enable_timestamps3: 'True'
frequency0: freq
frequency1: 1e9
frequency2: 1e9
frequency3: 1e9
gain0: '0'
gain1: '0'
gain2: '0'
gain3: '0'
instance_index: '-1'
iq_balance0: 'False'
iq_balance1: 'False'
iq_balance2: 'False'
iq_balance3: 'False'
maxoutbuf: '0'
minoutbuf: '0'
num_chans: '1'
rate: samp_rate
states:
bus_sink: false
bus_source: false
bus_structure: null
coordinate: [8, 140.0]
rotation: 0
state: true
- name: uhd_rfnoc_rx_streamer_0_0
id: uhd_rfnoc_rx_streamer
parameters:
adapter_id_list: '[0]'
affinity: ''
alias: ''
args: ''
comment: ''
issue_stream_cmd: 'True'
maxoutbuf: '0'
minoutbuf: '0'
num_chans: '1'
otw: s8
output_type: s8
start_time: '0'
start_time_set: 'False'
use_default_adapter_id: 'True'
vlen: fft_size
states:
bus_sink: false
bus_source: false
bus_structure: null
coordinate: [616, 344.0]
rotation: 180
state: true
- name: uhd_rfnoc_rx_streamer_0_0_0
id: uhd_rfnoc_rx_streamer
parameters:
adapter_id_list: '[0]'
affinity: ''
alias: ''
args: ''
comment: ''
issue_stream_cmd: 'True'
maxoutbuf: '0'
minoutbuf: '0'
num_chans: '1'
otw: s8
output_type: s8
start_time: '0'
start_time_set: 'False'
use_default_adapter_id: 'True'
vlen: fft_size
states:
bus_sink: false
bus_source: false
bus_structure: null
coordinate: [608, 504.0]
rotation: 180
state: true
connections:
- [qtgui_fosphor_display_0, cfg, blocks_message_debug_0, print]
- params:
is_back_edge: 'False'
snk_blk_id: uhd_rfnoc_fft_0
snk_port_id: '0'
src_blk_id: uhd_rfnoc_ddc_0
src_port_id: '0'
- params:
is_back_edge: 'False'
snk_blk_id: uhd_rfnoc_fosphor_0
snk_port_id: '0'
src_blk_id: uhd_rfnoc_fft_0
src_port_id: '0'
- params:
is_back_edge: 'False'
snk_blk_id: uhd_rfnoc_rx_streamer_0_0
snk_port_id: '0'
src_blk_id: uhd_rfnoc_fosphor_0
src_port_id: '0'
- params:
is_back_edge: 'False'
snk_blk_id: uhd_rfnoc_rx_streamer_0_0_0
snk_port_id: '0'
src_blk_id: uhd_rfnoc_fosphor_0
src_port_id: '1'
- params:
is_back_edge: 'False'
snk_blk_id: uhd_rfnoc_ddc_0
snk_port_id: '0'
src_blk_id: uhd_rfnoc_rx_radio_0
src_port_id: '0'
- [uhd_rfnoc_rx_streamer_0_0, '0', qtgui_fosphor_display_0, '0']
- [uhd_rfnoc_rx_streamer_0_0_0, '0', qtgui_fosphor_display_0, '1']
metadata:
file_format: 2
grc_version: v3.11.0.0git-975-gecac6321
# General parameters
# -----------------------------------------
schema: rfnoc_imagebuilder_args # Identifier for the schema used to
validate this file
copyright: >- # Copyright information used in file
headers
Copyright 2023 Ettus Research, a National Instruments Brand
license: >- # License information used in file
headers
SPDX-License-Identifier: LGPL-3.0-or-later
version: '1.0' # File version
chdr_width: 64 # Bit width of the CHDR bus for this
image
device: 'x310'
image_core_name: 'usrp_x310_fpga_HG' # This is used for the bitfile, DTS, and
report
default_target: 'X310_HG'
inherit:
- 'yaml_include/x3xx_radio_base.yml'
# A list of all stream endpoints in design
# ----------------------------------------
stream_endpoints:
ep0: # Stream endpoint name
buff_size: 65536 # Ingress buffer size for data
ep1:
buff_size: 0
ep2:
buff_size: 65536
ep3:
buff_size: 0
ep_fft_a:
ctrl: True
data: True
buff_size: 16384
ep_fft_b:
ctrl: False
data: True
buff_size: 16384
ep_fosphor_a:
ctrl: True
data: True
buff_size: 16384
ep_hist_a:
ctrl: False
data: True
buff_size: 16384
ep_wf_a:
ctrl: False
data: True
buff_size: 16384
ep_fosphor_b:
ctrl: True
data: True
buff_size: 16384
ep_hist_b:
ctrl: False
data: True
buff_size: 16384
ep_wf_b:
ctrl: False
data: True
buff_size: 16384
# A list of all NoC blocks in design
# ----------------------------------
noc_blocks:
fft_a:
block_desc: 'fft.yml'
parameters:
MAX_FFT_SIZE_LOG2: 10
fft_b:
block_desc: 'fft.yml'
parameters:
MAX_FFT_SIZE_LOG2: 10
fosphor_a:
block_desc: 'fosphor.yml'
fosphor_b:
block_desc: 'fosphor.yml'
# A list of all static connections in design
# ------------------------------------------
# Format: A list of connection maps (list of key-value pairs) with the
following keys
# - srcblk = Source block to connect
# - srcport = Port on the source block to connect
# - dstblk = Destination block to connect
# - dstport = Port on the destination block to connect
connections:
- { srcblk: ep_fft_a, srcport: out0, dstblk: fft_a, dstport: in_0 }
- { srcblk: fft_a, srcport: out_0, dstblk: ep_fft_a, dstport: in0 }
- { srcblk: ep_fosphor_a, srcport: out0, dstblk: fosphor_a, dstport: fft_in
}
- { srcblk: fosphor_a, srcport: hist, dstblk: ep_hist_a, dstport: in0 }
- { srcblk: fosphor_a, srcport: wf, dstblk: ep_wf_a, dstport: in0 }
- { srcblk: ep_fft_b, srcport: out0, dstblk: fft_b, dstport: in_0 }
- { srcblk: fft_b, srcport: out_0, dstblk: ep_fft_b, dstport: in0 }
- { srcblk: ep_fosphor_b, srcport: out0, dstblk: fosphor_b, dstport: fft_in
}
- { srcblk: fosphor_b, srcport: hist, dstblk: ep_hist_b, dstport: in0 }
- { srcblk: fosphor_b, srcport: wf, dstblk: ep_wf_b, dstport: in0 }
# A list of all clock domain connections in design
# ------------------------------------------------
# Format: A list of connection maps (list of key-value pairs) with the
following keys
# - srcblk = Source block to connect (Always "_device"_)
# - srcport = Clock domain on the source block to connect
# - dstblk = Destination block to connect
# - dstport = Clock domain on the destination block to connect
clk_domains:
- { srcblk: _device_, srcport: ce, dstblk: fft_a, dstport: ce }
- { srcblk: _device_, srcport: ce, dstblk: fft_b, dstport: ce }
- { srcblk: _device_, srcport: ce, dstblk: fosphor_a, dstport: ce }
- { srcblk: _device_, srcport: ce, dstblk: fosphor_b, dstport: ce }
# Build command
# -----------------------------------------
# rfnoc_image_builder --fpga-dir /home/zhouzhiwen/workarea/uhd/fpga --build-dir
/home/zhouzhiwen/RFNOC_Build/x310_with_fosphor_HG --build-output-dir
/home/zhouzhiwen/RFNOC_Build --build-ip-dir
/home/zhouzhiwen/RFNOC_Build/x310_with_fosphor_HG/build-ip --vivado-path
/home/zhouzhiwen/Xilinx2021.1/Vivado -y
/home/zhouzhiwen/RFNOC_Build/x310_with_fosphor_HG.yml -t X310_HG_______________________________________________
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