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Hello, 
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I am currently working with USRP X310 devices equipped with UBX-160 
daughterboards for both transmission and reception of data streams. To ensure 
continuous transmission without encountering memory underflow issues, I would 
like to know the maximum buffer memory size that the FPGA on the X310 can 
support for handling transmit data.

Could you please provide guidance or recommendations on this?

Thank you,

Getaneh Berie
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