Peter, welcome to the world of RFNoC. You did almost everything right. A couple of notes:
- The statement about SEPs being automatically corrected predates the feature of providing a crossbar matrix. If there was no crossbar matrix, then this would autoconnect everything. - On an FPGA, there is limited hardware to implement all the logic. The "fuller" the design, the less likely the FPGA build tool (Vivado) will be able to generate a valid design. That's when you get the timing error. The x440_X4_1600 image is already pretty full, so I'm not surprised it fails. - You can still try and make it work by finding some optimizations. Here are options: - You can statically connect the FFT instead of dynamically. That will reduce the size of the crossbar and require one less stream endpoint. - You can try and turn more 1s in the crossbar routes matrix into zeros. The reason we have this matrix in the first place is to exactly solve this problem (not enough resources on the FPGA). - You can also try and kick off several builds and hope you get lucky (but only if the design is not too full). - If necessary, you might have to remove some blocks (do you need the replay blocks, for example?) I hope this gets you unstuck. --M On Sun, Sep 21, 2025 at 10:38 PM Peter Gu via USRP-users < [email protected]> wrote: > Hello, > > to try out RFNoC on my X440 under UHD 4.8 I followed this instruction: > > https://kb.ettus.com/Getting_Started_with_RFNoC_in_UHD_4.0 > > Building the default FPGA Image via x440_X4_1600_rfnoc_image_core.yml > works. > > But when I try to continue with “Example: Adding an FFT Block“ it doesn’t > work anymore. > > 1.) Although the tutorial states that “All SEPs are automatically > connected to the CHDR crossbar, so this effectively connects the FFT block > to the crossbar, allowing it to communicate with anything on the RFNoC > network.“, I will get an error that it needs an 10x10 matrix for > crossbar_routes. So I fixed this with the following matrix: > > crossbar_routes: > > # eth0 eth2 dma ep1 ep3 > > # eth1 eth3 ep0 ep2 > > - [ 1, 0, 0, 0, 0, 1, 1, 1, 1, 1 ] # eth0 (QSFP Port 0, Lane 0) > > - [ 0, 1, 0, 0, 0, 1, 1, 1, 1, 1 ] # eth1 (QSFP Port 0, Lane 1) > > - [ 0, 0, 1, 0, 0, 1, 1, 1, 1, 1 ] # eth2 (QSFP Port 0, Lane 2) > > - [ 0, 0, 0, 1, 0, 1, 1, 1, 1, 1 ] # eth3 (QSFP Port 0, Lane 3) > > - [ 0, 0, 0, 0, 1, 1, 1, 1, 1, 1 ] # dma > > - [ 1, 1, 1, 1, 1, 0, 0, 1, 1, 1 ] # ep0 (radio0.0) > > - [ 1, 1, 1, 1, 1, 0, 0, 1, 1, 1 ] # ep1 (radio1.0) > > - [ 1, 1, 1, 1, 1, 1, 1, 0, 0, 0 ] # ep2 (replay0.0) > > - [ 1, 1, 1, 1, 1, 1, 1, 0, 0, 0 ] # ep3 (replay1.0) > > - [ 1, 1, 1, 1, 1, 1, 1, 0, 0, 0 ] # ep3 (fft) > > > 2) The image build fails after roughly 7 hours, with the error: > > CRITICAL WARNING: [Route 35-39] The design did not meet timing > requirements. Please run report_timing_summary for detailed reports. > > > Do you know where I did a mistake in understanding the tutorial? > > > Thanks! > _______________________________________________ > USRP-users mailing list -- [email protected] > To unsubscribe send an email to [email protected] >
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