it seems that the problem is when I use more than 8 eps. but i don't find any limitation on this.
בתאריך יום ד׳, 28 בינו׳ 2026 ב-10:34 מאת Daniel Ozer < [email protected]>: > Hello everyone, > I need to create a bitfile for the X440 usrp (based on the X4_200 variant, > with uhd 4.9.0.0) which takes each rx port split it 2^n ports, each port go > to a ddc then to the eps. > While i managed to accomplish it when the number of the eps is equal/lower > than 8, each time when there is more than 8 eps i successfully passed the > creation of the bitfile but when trying to load (using the > uhd_image_loader) it on the usrp i get the following error at the end: > > [ERROR] [RFNOC::GRAPH] Caught exception while initializing graph: > RfnocError: Specified destination address is unreachable: 1:0 > Error: RuntimeError: Failure to create rfnoc_graph > > I tried many variation (see the attached yml) -which include adding to all > eps True on the CTRL option, i tried to use only 2 eps with 8 in_ports and > more. > > What may cause the problem? > it seems in the documation there is no limit for the number of the eps (or > ddc,splitter) as long as I managed to implement it successfully on the fpga. > > thank you all in advance. >
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