Hi Brian, I had this exact same issue on my X440, and Im currently debugging it with NI Support. They believe it's a hardware fault and the unit needs to be RMA'd. I was instructed to run x4xx_query_adc_threshold.py from uhd/host/utils (you can scp this onto the device and run it on there) and check if all channels return values between 4000 and 5000. My channel that was erroring consistently returned a value around 500, and they said that confirms the hardware problem and I need to request a repair.
Good luck, Chris On Tue, May 5, 2026 at 1:46 PM Brian Padalino <[email protected]> wrote: > I recently had an issue where the initialization of UHD ended up erroring > out with "Could not find appropriate gain for performing ADC self cal". > Reading through the code, it seemed like some strong input signal is > tripping a threshold register and causing initial calibration to fail? > > When reading through PG269 about the data converters, there are a few > mentions about conditions for calibration especially regarding the freeze > pins on the converter. Specifically: > > "Input signal contents at Fs/N, where N = 8 and 4 for the Dual and Quad > RF-ADC tile respectively, must be muted during foreground calibration of > OCB2. The signal component at the k*Fs/N bins should be less than -95 dBFs." > > "Gain and Time Skew calibration blocks (GCB, TSCB) should be put in freeze > mode when the input signal drops below -40 dBFs level for longer than 100 > μs." > > "For applicable systems, a training signal can also be used to calibrate > the GCB and TSCB before switching the system to real time operation." > > I noticed in the BD that the freeze pins aren't connected to anything. Is > there any guidance you can give with the X440 in a deployed system where > it's connected to an antenna? Are there any internal switches to disconnect > the RF ports for initialization or is this something that needs to happen > somewhere else? > > Also, any guidance on signals below -40 dBFS for longer than 100 us? Are > there options in UHD to handle this a little better? > > Lastly, any guidance on the initial error happening regarding the ADC self > cal would be appreciated. Have you seen this happen sporadically or is it > pretty well known the conditions that this will happen? > > Thanks, > Brian > _______________________________________________ > USRP-users mailing list -- [email protected] > To unsubscribe send an email to [email protected] >
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