On Thu, Nov 20, 2008 at 6:51 PM, <[EMAIL PROTECTED]> wrote: > > Reviewers: iposva, > > Description: > Turn ASSERT(!rn.is(ip)) into CHECK so the error can be caught in release > mode.
It seems a pity to slow down the release version of the VM with this check when the DEBUG version would have caught it. I realise that the DEBUG version of the VM is impossibly slow on native ARM hardware, but on the simulator has the runtime code (where you are slowed down by DEBUG) in native code. > > > It addresses the problem of 'cmp' instruction that has the side-effect > that ip register > shouldn't be used as rn. > > > Please review this at http://codereview.chromium.org/11323 > > SVN Base: http://v8.googlecode.com/svn/branches/bleeding_edge/ > > Affected files: > M src/assembler-arm.cc > > > Index: src/assembler-arm.cc > =================================================================== > --- src/assembler-arm.cc (revision 805) > +++ src/assembler-arm.cc (working copy) > @@ -554,7 +554,7 @@ > // However, if the original instruction is a 'mov rd, x' (not > setting the > // condition code), then replace it with a 'ldr rd, [pc]' > RecordRelocInfo(x.rmode_, x.imm32_); > - ASSERT(!rn.is(ip)); // rn should never be ip, or will be trashed > + CHECK(!rn.is(ip)); // rn should never be ip, or will be trashed > Condition cond = static_cast<Condition>(instr & CondMask); > if ((instr & ~CondMask) == 13*B21) { // mov, S not set > ldr(rd, MemOperand(pc, 0), cond); > > > > > > -- Erik Corry, Software Engineer Google Denmark ApS. CVR nr. 28 86 69 84 c/o Philip & Partners, 7 Vognmagergade, P.O. Box 2227, DK-1018 Copenhagen K, Denmark. --~--~---------~--~----~------------~-------~--~----~ v8-dev mailing list [email protected] http://groups.google.com/group/v8-dev -~----------~----~----~----~------~----~------~--~---
