http://codereview.chromium.org/21536/diff/7/10 File src/codegen-ia32.cc (right):
http://codereview.chromium.org/21536/diff/7/10#newcode4520 Line 4520: __ fisttp_d(Operand(esp, 2 * kPointerSize)); This is an SSE3 instruction :-(. I guess we can still use it but not in snapshots and not without checking for SSE3. See the Exceptions section of the Intel documentation where it says it throws UD if the SSE3 bit is not set. http://codereview.chromium.org/21536 --~--~---------~--~----~------------~-------~--~----~ v8-dev mailing list [email protected] http://groups.google.com/group/v8-dev -~----------~----~----~----~------~----~------~--~---
