Reviewers: Kasper Lund, Description: Fix incorrect assert on ARM that assumed that coprocessor id was always zero. This is hit in debug mode on non-EABI non-simulator ARM platforms. Thanks to [email protected] for reporting.
Please review this at http://codereview.chromium.org/113299 SVN Base: http://v8.googlecode.com/svn/branches/bleeding_edge/ Affected files: M src/arm/assembler-arm.cc Index: src/arm/assembler-arm.cc =================================================================== --- src/arm/assembler-arm.cc (revision 1918) +++ src/arm/assembler-arm.cc (working copy) @@ -211,6 +211,7 @@ // Instruction bit masks RdMask = 15 << 12, // in str instruction CondMask = 15 << 28, + CoprocessorMask = 15 << 8, OpCodeMask = 15 << 21, // in data-processing instructions Imm24Mask = (1 << 24) - 1, Off12Mask = (1 << 12) - 1, @@ -616,7 +617,8 @@ void Assembler::addrmod5(Instr instr, CRegister crd, const MemOperand& x) { // unindexed addressing is not encoded by this function - ASSERT((instr & ~(CondMask | P | U | N | W | L)) == (B27 | B26)); + ASSERT_EQ((B27 | B26), + (instr & ~(CondMask | CoprocessorMask | P | U | N | W | L))); ASSERT(x.rn_.is_valid() && !x.rm_.is_valid()); int am = x.am_; int offset_8 = x.offset_; --~--~---------~--~----~------------~-------~--~----~ v8-dev mailing list [email protected] http://groups.google.com/group/v8-dev -~----------~----~----~----~------~----~------~--~---
