Author: [email protected]
Date: Tue Jun 2 04:43:26 2009
New Revision: 2088
Modified:
branches/bleeding_edge/src/assembler.h
branches/bleeding_edge/src/x64/assembler-x64.cc
branches/bleeding_edge/src/x64/assembler-x64.h
Log:
Add shift operations to x64 assembler.
Review URL: http://codereview.chromium.org/118107
Modified: branches/bleeding_edge/src/assembler.h
==============================================================================
--- branches/bleeding_edge/src/assembler.h (original)
+++ branches/bleeding_edge/src/assembler.h Tue Jun 2 04:43:26 2009
@@ -441,6 +441,7 @@
static inline bool is_uint3(int x) { return is_uintn(x, 3); }
static inline bool is_uint4(int x) { return is_uintn(x, 4); }
static inline bool is_uint5(int x) { return is_uintn(x, 5); }
+static inline bool is_uint6(int x) { return is_uintn(x, 6); }
static inline bool is_uint8(int x) { return is_uintn(x, 8); }
static inline bool is_uint12(int x) { return is_uintn(x, 12); }
static inline bool is_uint16(int x) { return is_uintn(x, 16); }
Modified: branches/bleeding_edge/src/x64/assembler-x64.cc
==============================================================================
--- branches/bleeding_edge/src/x64/assembler-x64.cc (original)
+++ branches/bleeding_edge/src/x64/assembler-x64.cc Tue Jun 2 04:43:26 2009
@@ -342,6 +342,32 @@
}
+void Assembler::shift(Register dst, Immediate shift_amount, int subcode) {
+ EnsureSpace ensure_space(this);
+ last_pc_ = pc_;
+ ASSERT(is_uint6(shift_amount.value_)); // illegal shift count
+ if (shift_amount.value_ == 1) {
+ emit_rex_64(dst);
+ emit(0xD1);
+ emit(0xC0 | (subcode << 3) | (dst.code() & 0x7));
+ } else {
+ emit_rex_64(dst);
+ emit(0xC1);
+ emit(0xC0 | (subcode << 3) | (dst.code() & 0x7));
+ emit(shift_amount.value_);
+ }
+}
+
+
+void Assembler::shift(Register dst, int subcode) {
+ EnsureSpace ensure_space(this);
+ last_pc_ = pc_;
+ emit_rex_64(dst);
+ emit(0xD3);
+ emit(0xC0 | (subcode << 3) | (dst.code() & 0x7));
+}
+
+
void Assembler::call(Label* L) {
EnsureSpace ensure_space(this);
last_pc_ = pc_;
Modified: branches/bleeding_edge/src/x64/assembler-x64.h
==============================================================================
--- branches/bleeding_edge/src/x64/assembler-x64.h (original)
+++ branches/bleeding_edge/src/x64/assembler-x64.h Tue Jun 2 04:43:26 2009
@@ -558,21 +558,38 @@
void rcl(Register dst, uint8_t imm8);
- void sar(Register dst, uint8_t imm8);
- void sar(Register dst);
-
void sbb(Register dst, const Operand& src);
void shld(Register dst, const Operand& src);
- void shl(Register dst, uint8_t imm8);
- void shl(Register dst);
-
void shrd(Register dst, const Operand& src);
- void shr(Register dst, uint8_t imm8);
- void shr(Register dst);
- void shr_cl(Register dst);
+ // Shifts dst right, duplicating sign bit, by shift_amount bits.
+ // Shifting by 1 is handled efficiently.
+ void sar(Register dst, Immediate shift_amount) {
+ shift(dst, shift_amount, 0x7);
+ }
+
+ // Shifts dst right, duplicating sign bit, by cl % 64 bits.
+ void sar(Register dst) {
+ shift(dst, 0x7);
+ }
+
+ void shl(Register dst, Immediate shift_amount) {
+ shift(dst, shift_amount, 0x4);
+ }
+
+ void shl(Register dst) {
+ shift(dst, 0x4);
+ }
+
+ void shr(Register dst, Immediate shift_amount) {
+ shift(dst, shift_amount, 0x5);
+ }
+
+ void shr(Register dst) {
+ shift(dst, 0x5);
+ }
void sub(Register dst, Register src) {
arithmetic_op(0x2B, dst, src);
@@ -884,6 +901,10 @@
void arithmetic_op(byte opcode, Register reg, const Operand& op);
void immediate_arithmetic_op(byte subcode, Register dst, Immediate src);
void immediate_arithmetic_op(byte subcode, const Operand& dst, Immediate
src);
+ // Emit machine code for a shift operation.
+ void shift(Register dst, Immediate shift_amount, int subcode);
+ // Shift dst by cl % 64 bits.
+ void shift(Register dst, int subcode);
void emit_farith(int b1, int b2, int i);
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