Reviewers: danno, Toon Verwaest, Paul Lind, palfia, dusmil, kisg,
Description:
MIPS: Remove ASSERT since there are tons of different ASSIGN variants
Port r22382 (84a841f)
BUG=
Please review this at https://codereview.chromium.org/395503002/
SVN Base: https://v8.googlecode.com/svn/branches/bleeding_edge
Affected files (+0, -4 lines):
M src/mips/full-codegen-mips.cc
M src/mips64/full-codegen-mips64.cc
Index: src/mips/full-codegen-mips.cc
diff --git a/src/mips/full-codegen-mips.cc b/src/mips/full-codegen-mips.cc
index
a44593c9488c899f57d8b95faf1c2563731b2c23..a4ca21d089f467eebb3587ecb0883f3f83f077ef
100644
--- a/src/mips/full-codegen-mips.cc
+++ b/src/mips/full-codegen-mips.cc
@@ -2496,8 +2496,6 @@ void
FullCodeGenerator::EmitVariableAssignment(Variable* var, Token::Value op) {
} else if (!var->is_const_mode() || op == Token::INIT_CONST) {
if (var->IsLookupSlot()) {
- ASSERT(op == Token::ASSIGN || op == Token::INIT_VAR ||
- op == Token::ASSIGN_ADD);
// Assignment to var.
__ li(a1, Operand(var->name()));
__ li(a0, Operand(Smi::FromInt(strict_mode())));
Index: src/mips64/full-codegen-mips64.cc
diff --git a/src/mips64/full-codegen-mips64.cc
b/src/mips64/full-codegen-mips64.cc
index
c5eec12331eb464a3e6960dc6a0a2c2aa0108106..4eb60eaaf327b11d28b44803dff68bb2c73d1942
100644
--- a/src/mips64/full-codegen-mips64.cc
+++ b/src/mips64/full-codegen-mips64.cc
@@ -2490,8 +2490,6 @@ void
FullCodeGenerator::EmitVariableAssignment(Variable* var, Token::Value op) {
} else if (!var->is_const_mode() || op == Token::INIT_CONST) {
if (var->IsLookupSlot()) {
- ASSERT(op == Token::ASSIGN || op == Token::INIT_VAR ||
- op == Token::ASSIGN_ADD);
// Assignment to var.
__ li(a4, Operand(var->name()));
__ li(a3, Operand(Smi::FromInt(strict_mode())));
--
--
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