https://codereview.chromium.org/426863006/diff/1/src/mips64/assembler-mips64.cc
File src/mips64/assembler-mips64.cc (right):
https://codereview.chromium.org/426863006/diff/1/src/mips64/assembler-mips64.cc#newcode1392
src/mips64/assembler-mips64.cc:1392: jalr(rs, at);
On 2014/07/29 14:58:04, paul.l... wrote:
I think this should be jalr(rs, zero_reg)
Also, jalr() itself does the WriteRecordedPositions() and the
BlockTrampolinePoolFor(1) so you should probably rearrange the if
statement to
exclude those.
Done.
https://codereview.chromium.org/426863006/diff/1/src/mips64/assembler-mips64.cc#newcode1911
src/mips64/assembler-mips64.cc:1911: GenInstrImmediate(LUI, rs, rt, j);
On 2014/07/29 14:58:04, paul.l... wrote:
A comment here about LUI/AUI and zero_reg would be helpful, though I
suppose one
could just look at previous instruction ;)
Done.
https://codereview.chromium.org/426863006/diff/1/src/mips64/assembler-mips64.cc#newcode2521
src/mips64/assembler-mips64.cc:2521: ASSERT(is_uint3(cc));
On 2014/07/29 14:58:04, paul.l... wrote:
Maybe ASSERT(kArchVariant != kMips64r6) here?
Done.
https://codereview.chromium.org/426863006/diff/1/src/mips64/constants-mips64.h
File src/mips64/constants-mips64.h (right):
https://codereview.chromium.org/426863006/diff/1/src/mips64/constants-mips64.h#newcode20
src/mips64/constants-mips64.h:20: kMips64r1,
On 2014/07/29 14:58:04, paul.l... wrote:
I do not think we need kMips64r1 -- there are only 2 other usages, and
it seems
they can be skipped.
Done.
https://codereview.chromium.org/426863006/diff/1/src/mips64/constants-mips64.h#newcode20
src/mips64/constants-mips64.h:20: kMips64r1,
I agree. I removed kLoongson also, newer versions of it is Mips64r2
compliant.
https://codereview.chromium.org/426863006/diff/1/src/mips64/constants-mips64.h#newcode419
src/mips64/constants-mips64.h:419: MUL_MUH = ((3 << 3) + 0), //
MUL, MUH.
On 2014/07/29 14:58:04, paul.l... wrote:
nit: one space after MUL,
Done.
https://codereview.chromium.org/426863006/diff/1/src/mips64/disasm-mips64.cc
File src/mips64/disasm-mips64.cc (right):
https://codereview.chromium.org/426863006/diff/1/src/mips64/disasm-mips64.cc#newcode675
src/mips64/disasm-mips64.cc:675: case D_MUL_MUH: // Eqauls to DMUL.
On 2014/07/29 14:58:04, paul.l... wrote:
nit: Eqauls -> Equals
Done.
https://codereview.chromium.org/426863006/diff/1/src/mips64/macro-assembler-mips64.cc
File src/mips64/macro-assembler-mips64.cc (right):
https://codereview.chromium.org/426863006/diff/1/src/mips64/macro-assembler-mips64.cc#newcode761
src/mips64/macro-assembler-mips64.cc:761: // dmul(rd, rs, rt.rm());
On 2014/07/29 14:58:04, paul.l... wrote:
I think we can now remove this TODO, and the one just below.
Done.
https://codereview.chromium.org/426863006/diff/1/src/mips64/simulator-mips64.cc
File src/mips64/simulator-mips64.cc (right):
https://codereview.chromium.org/426863006/diff/1/src/mips64/simulator-mips64.cc#newcode2086
src/mips64/simulator-mips64.cc:2086: case MULT: // MULT == D_MUL_MUH
On 2014/07/29 14:58:04, paul.l... wrote:
nit: end comment with period, here and DMULT below.
Done.
https://codereview.chromium.org/426863006/diff/1/src/mips64/simulator-mips64.cc#newcode2660
src/mips64/simulator-mips64.cc:2660: case DMULT: // DMULT == D_MUL_MUH
On 2014/07/29 14:58:04, paul.l... wrote:
nit: trailing period on comment.
Done.
https://codereview.chromium.org/426863006/
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