Reviewers: Benedikt Meurer, ulan,
Message:
After that I'll activate the tests.
Description:
ARM64: minor corrections for TF.
BUG=
Please review this at https://codereview.chromium.org/462573002/
SVN Base: https://v8.googlecode.com/svn/branches/bleeding_edge
Affected files (+1, -2 lines):
M src/compiler/arm64/code-generator-arm64.cc
M src/compiler/arm64/instruction-selector-arm64.cc
Index: src/compiler/arm64/code-generator-arm64.cc
diff --git a/src/compiler/arm64/code-generator-arm64.cc
b/src/compiler/arm64/code-generator-arm64.cc
index
52e6b4606b4f70b38042d58ead8512e80f20faa0..065889cfbb39e4c995a6bedd3e3ae2986d5b7973
100644
--- a/src/compiler/arm64/code-generator-arm64.cc
+++ b/src/compiler/arm64/code-generator-arm64.cc
@@ -611,7 +611,6 @@ void CodeGenerator::AssembleArchBoolean(Instruction*
instr,
}
__ bind(&check);
__ Cset(reg, cc);
- __ B(&done);
__ Bind(&done);
}
Index: src/compiler/arm64/instruction-selector-arm64.cc
diff --git a/src/compiler/arm64/instruction-selector-arm64.cc
b/src/compiler/arm64/instruction-selector-arm64.cc
index
bd23dfd17e2a6fc9d7a85181df26f2c8a46a55c3..3cd62f69ee4a86c899a8f5798e2841cdb54c1a8c
100644
--- a/src/compiler/arm64/instruction-selector-arm64.cc
+++ b/src/compiler/arm64/instruction-selector-arm64.cc
@@ -184,7 +184,7 @@ void InstructionSelector::VisitLoad(Node* node) {
if (g.CanBeImmediate(index, kLoadStoreImm)) {
Emit(opcode | AddressingModeField::encode(kMode_MRI), result,
g.UseRegister(base), g.UseImmediate(index));
- } else if (g.CanBeImmediate(index, kLoadStoreImm)) {
+ } else if (g.CanBeImmediate(base, kLoadStoreImm)) {
Emit(opcode | AddressingModeField::encode(kMode_MRI), result,
g.UseRegister(index), g.UseImmediate(base));
} else {
--
--
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