Reviewers: paul.l..., gergely.kis.imgtec, akos.palfi.imgtec, balazs.kilvady,
Description:
MIPS: Fix DCHECK failure in simulator for fp32 mode.
TEST=mjsunit tests in debug
BUG=
Please review this at https://codereview.chromium.org/467203002/
SVN Base: https://v8.googlecode.com/svn/branches/bleeding_edge
Affected files (+4, -4 lines):
M src/mips/simulator-mips.cc
Index: src/mips/simulator-mips.cc
diff --git a/src/mips/simulator-mips.cc b/src/mips/simulator-mips.cc
index
d40fac7cb0541b8bf8c0d0ea6b1ed9fcfd331210..2478539d1e96e185fb852fe5655609da71861622
100644
--- a/src/mips/simulator-mips.cc
+++ b/src/mips/simulator-mips.cc
@@ -2290,7 +2290,7 @@ void Simulator::DecodeTypeRegister(Instruction*
instr) {
}
set_fpu_register_word(fd_reg, result);
if (set_fcsr_round_error(fs, rounded)) {
- set_fpu_register(fd_reg, kFPUInvalidResult);
+ set_fpu_register_word(fd_reg, kFPUInvalidResult);
}
}
break;
@@ -2300,7 +2300,7 @@ void Simulator::DecodeTypeRegister(Instruction*
instr) {
int32_t result = static_cast<int32_t>(rounded);
set_fpu_register_word(fd_reg, result);
if (set_fcsr_round_error(fs, rounded)) {
- set_fpu_register(fd_reg, kFPUInvalidResult);
+ set_fpu_register_word(fd_reg, kFPUInvalidResult);
}
}
break;
@@ -2310,7 +2310,7 @@ void Simulator::DecodeTypeRegister(Instruction*
instr) {
int32_t result = static_cast<int32_t>(rounded);
set_fpu_register_word(fd_reg, result);
if (set_fcsr_round_error(fs, rounded)) {
- set_fpu_register(fd_reg, kFPUInvalidResult);
+ set_fpu_register_word(fd_reg, kFPUInvalidResult);
}
}
break;
@@ -2320,7 +2320,7 @@ void Simulator::DecodeTypeRegister(Instruction*
instr) {
int32_t result = static_cast<int32_t>(rounded);
set_fpu_register_word(fd_reg, result);
if (set_fcsr_round_error(fs, rounded)) {
- set_fpu_register(fd_reg, kFPUInvalidResult);
+ set_fpu_register_word(fd_reg, kFPUInvalidResult);
}
}
break;
--
--
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