Revision: 23359
Author: [email protected]
Date: Mon Aug 25 14:12:12 2014 UTC
Log: Eliminate code duplication in lithium calls to vector-based
LoadICs
[email protected]
Review URL: https://codereview.chromium.org/500073002
https://code.google.com/p/v8/source/detail?r=23359
Modified:
/branches/bleeding_edge/src/arm/lithium-codegen-arm.cc
/branches/bleeding_edge/src/arm/lithium-codegen-arm.h
/branches/bleeding_edge/src/arm64/lithium-codegen-arm64.cc
/branches/bleeding_edge/src/arm64/lithium-codegen-arm64.h
/branches/bleeding_edge/src/ia32/lithium-codegen-ia32.cc
/branches/bleeding_edge/src/ia32/lithium-codegen-ia32.h
/branches/bleeding_edge/src/x64/lithium-codegen-x64.cc
/branches/bleeding_edge/src/x64/lithium-codegen-x64.h
=======================================
--- /branches/bleeding_edge/src/arm/lithium-codegen-arm.cc Mon Aug 25
07:02:19 2014 UTC
+++ /branches/bleeding_edge/src/arm/lithium-codegen-arm.cc Mon Aug 25
14:12:12 2014 UTC
@@ -2988,6 +2988,19 @@
DeoptimizeIf(eq, instr->environment());
}
}
+
+
+template <class T>
+void LCodeGen::EmitVectorLoadICRegisters(T* instr) {
+ DCHECK(FLAG_vector_ics);
+ Register vector = ToRegister(instr->temp_vector());
+ DCHECK(vector.is(LoadIC::VectorRegister()));
+ __ Move(vector, instr->hydrogen()->feedback_vector());
+ // No need to allocate this register.
+ DCHECK(LoadIC::SlotRegister().is(r0));
+ __ mov(LoadIC::SlotRegister(),
+ Operand(Smi::FromInt(instr->hydrogen()->slot())));
+}
void LCodeGen::DoLoadGlobalGeneric(LLoadGlobalGeneric* instr) {
@@ -2997,13 +3010,7 @@
__ mov(LoadIC::NameRegister(), Operand(instr->name()));
if (FLAG_vector_ics) {
- Register vector = ToRegister(instr->temp_vector());
- DCHECK(vector.is(LoadIC::VectorRegister()));
- __ Move(vector, instr->hydrogen()->feedback_vector());
- // No need to allocate this register.
- DCHECK(LoadIC::SlotRegister().is(r0));
- __ mov(LoadIC::SlotRegister(),
- Operand(Smi::FromInt(instr->hydrogen()->slot())));
+ EmitVectorLoadICRegisters<LLoadGlobalGeneric>(instr);
}
ContextualMode mode = instr->for_typeof() ? NOT_CONTEXTUAL : CONTEXTUAL;
Handle<Code> ic = LoadIC::initialize_stub(isolate(), mode);
@@ -3126,13 +3133,7 @@
// Name is always in r2.
__ mov(LoadIC::NameRegister(), Operand(instr->name()));
if (FLAG_vector_ics) {
- Register vector = ToRegister(instr->temp_vector());
- DCHECK(vector.is(LoadIC::VectorRegister()));
- __ Move(vector, instr->hydrogen()->feedback_vector());
- // No need to allocate this register.
- DCHECK(LoadIC::SlotRegister().is(r0));
- __ mov(LoadIC::SlotRegister(),
- Operand(Smi::FromInt(instr->hydrogen()->slot())));
+ EmitVectorLoadICRegisters<LLoadNamedGeneric>(instr);
}
Handle<Code> ic = LoadIC::initialize_stub(isolate(), NOT_CONTEXTUAL);
CallCode(ic, RelocInfo::CODE_TARGET, instr, NEVER_INLINE_TARGET_ADDRESS);
@@ -3422,13 +3423,7 @@
DCHECK(ToRegister(instr->key()).is(LoadIC::NameRegister()));
if (FLAG_vector_ics) {
- Register vector = ToRegister(instr->temp_vector());
- DCHECK(vector.is(LoadIC::VectorRegister()));
- __ Move(vector, instr->hydrogen()->feedback_vector());
- // No need to allocate this register.
- DCHECK(LoadIC::SlotRegister().is(r0));
- __ mov(LoadIC::SlotRegister(),
- Operand(Smi::FromInt(instr->hydrogen()->slot())));
+ EmitVectorLoadICRegisters<LLoadKeyedGeneric>(instr);
}
Handle<Code> ic = isolate()->builtins()->KeyedLoadIC_Initialize();
=======================================
--- /branches/bleeding_edge/src/arm/lithium-codegen-arm.h Mon Aug 4
11:34:54 2014 UTC
+++ /branches/bleeding_edge/src/arm/lithium-codegen-arm.h Mon Aug 25
14:12:12 2014 UTC
@@ -332,6 +332,9 @@
void DoStoreKeyedFixedDoubleArray(LStoreKeyed* instr);
void DoStoreKeyedFixedArray(LStoreKeyed* instr);
+ template <class T>
+ void EmitVectorLoadICRegisters(T* instr);
+
ZoneList<LEnvironment*> deoptimizations_;
ZoneList<Deoptimizer::JumpTableEntry> deopt_jump_table_;
ZoneList<Handle<Object> > deoptimization_literals_;
=======================================
--- /branches/bleeding_edge/src/arm64/lithium-codegen-arm64.cc Mon Aug 25
07:02:19 2014 UTC
+++ /branches/bleeding_edge/src/arm64/lithium-codegen-arm64.cc Mon Aug 25
14:12:12 2014 UTC
@@ -3342,6 +3342,18 @@
result, Heap::kTheHoleValueRootIndex, instr->environment());
}
}
+
+
+template <class T>
+void LCodeGen::EmitVectorLoadICRegisters(T* instr) {
+ DCHECK(FLAG_vector_ics);
+ Register vector = ToRegister(instr->temp_vector());
+ DCHECK(vector.is(LoadIC::VectorRegister()));
+ __ Mov(vector, instr->hydrogen()->feedback_vector());
+ // No need to allocate this register.
+ DCHECK(LoadIC::SlotRegister().is(x0));
+ __ Mov(LoadIC::SlotRegister(), Smi::FromInt(instr->hydrogen()->slot()));
+}
void LCodeGen::DoLoadGlobalGeneric(LLoadGlobalGeneric* instr) {
@@ -3350,13 +3362,7 @@
DCHECK(ToRegister(instr->result()).Is(x0));
__ Mov(LoadIC::NameRegister(), Operand(instr->name()));
if (FLAG_vector_ics) {
- Register vector = ToRegister(instr->temp_vector());
- DCHECK(vector.is(LoadIC::VectorRegister()));
- __ Mov(vector, instr->hydrogen()->feedback_vector());
- // No need to allocate this register.
- DCHECK(LoadIC::SlotRegister().is(x0));
- __ Mov(LoadIC::SlotRegister(),
- Smi::FromInt(instr->hydrogen()->slot()));
+ EmitVectorLoadICRegisters<LLoadGlobalGeneric>(instr);
}
ContextualMode mode = instr->for_typeof() ? NOT_CONTEXTUAL : CONTEXTUAL;
Handle<Code> ic = LoadIC::initialize_stub(isolate(), mode);
@@ -3611,13 +3617,7 @@
DCHECK(ToRegister(instr->object()).is(LoadIC::ReceiverRegister()));
DCHECK(ToRegister(instr->key()).is(LoadIC::NameRegister()));
if (FLAG_vector_ics) {
- Register vector = ToRegister(instr->temp_vector());
- DCHECK(vector.is(LoadIC::VectorRegister()));
- __ Mov(vector, instr->hydrogen()->feedback_vector());
- // No need to allocate this register.
- DCHECK(LoadIC::SlotRegister().is(x0));
- __ Mov(LoadIC::SlotRegister(),
- Smi::FromInt(instr->hydrogen()->slot()));
+ EmitVectorLoadICRegisters<LLoadKeyedGeneric>(instr);
}
Handle<Code> ic = isolate()->builtins()->KeyedLoadIC_Initialize();
@@ -3673,13 +3673,7 @@
DCHECK(ToRegister(instr->object()).is(LoadIC::ReceiverRegister()));
__ Mov(LoadIC::NameRegister(), Operand(instr->name()));
if (FLAG_vector_ics) {
- Register vector = ToRegister(instr->temp_vector());
- DCHECK(vector.is(LoadIC::VectorRegister()));
- __ Mov(vector, instr->hydrogen()->feedback_vector());
- // No need to allocate this register.
- DCHECK(LoadIC::SlotRegister().is(x0));
- __ Mov(LoadIC::SlotRegister(),
- Smi::FromInt(instr->hydrogen()->slot()));
+ EmitVectorLoadICRegisters<LLoadNamedGeneric>(instr);
}
Handle<Code> ic = LoadIC::initialize_stub(isolate(), NOT_CONTEXTUAL);
=======================================
--- /branches/bleeding_edge/src/arm64/lithium-codegen-arm64.h Tue Aug 19
13:32:24 2014 UTC
+++ /branches/bleeding_edge/src/arm64/lithium-codegen-arm64.h Mon Aug 25
14:12:12 2014 UTC
@@ -196,6 +196,9 @@
int* offset,
AllocationSiteMode mode);
+ template <class T>
+ void EmitVectorLoadICRegisters(T* instr);
+
// Emits optimized code for %_IsString(x). Preserves input register.
// Returns the condition on which a final split to
// true and false label should be made, to optimize fallthrough.
=======================================
--- /branches/bleeding_edge/src/ia32/lithium-codegen-ia32.cc Mon Aug 25
07:02:19 2014 UTC
+++ /branches/bleeding_edge/src/ia32/lithium-codegen-ia32.cc Mon Aug 25
14:12:12 2014 UTC
@@ -2826,6 +2826,19 @@
DeoptimizeIf(equal, instr->environment());
}
}
+
+
+template <class T>
+void LCodeGen::EmitVectorLoadICRegisters(T* instr) {
+ DCHECK(FLAG_vector_ics);
+ Register vector = ToRegister(instr->temp_vector());
+ DCHECK(vector.is(LoadIC::VectorRegister()));
+ __ mov(vector, instr->hydrogen()->feedback_vector());
+ // No need to allocate this register.
+ DCHECK(LoadIC::SlotRegister().is(eax));
+ __ mov(LoadIC::SlotRegister(),
+ Immediate(Smi::FromInt(instr->hydrogen()->slot())));
+}
void LCodeGen::DoLoadGlobalGeneric(LLoadGlobalGeneric* instr) {
@@ -2835,13 +2848,7 @@
__ mov(LoadIC::NameRegister(), instr->name());
if (FLAG_vector_ics) {
- Register vector = ToRegister(instr->temp_vector());
- DCHECK(vector.is(LoadIC::VectorRegister()));
- __ mov(vector, instr->hydrogen()->feedback_vector());
- // No need to allocate this register.
- DCHECK(LoadIC::SlotRegister().is(eax));
- __ mov(LoadIC::SlotRegister(),
- Immediate(Smi::FromInt(instr->hydrogen()->slot())));
+ EmitVectorLoadICRegisters<LLoadGlobalGeneric>(instr);
}
ContextualMode mode = instr->for_typeof() ? NOT_CONTEXTUAL : CONTEXTUAL;
Handle<Code> ic = LoadIC::initialize_stub(isolate(), mode);
@@ -2978,13 +2985,7 @@
__ mov(LoadIC::NameRegister(), instr->name());
if (FLAG_vector_ics) {
- Register vector = ToRegister(instr->temp_vector());
- DCHECK(vector.is(LoadIC::VectorRegister()));
- __ mov(vector, instr->hydrogen()->feedback_vector());
- // No need to allocate this register.
- DCHECK(LoadIC::SlotRegister().is(eax));
- __ mov(LoadIC::SlotRegister(),
- Immediate(Smi::FromInt(instr->hydrogen()->slot())));
+ EmitVectorLoadICRegisters<LLoadNamedGeneric>(instr);
}
Handle<Code> ic = LoadIC::initialize_stub(isolate(), NOT_CONTEXTUAL);
CallCode(ic, RelocInfo::CODE_TARGET, instr);
@@ -3211,13 +3212,7 @@
DCHECK(ToRegister(instr->key()).is(LoadIC::NameRegister()));
if (FLAG_vector_ics) {
- Register vector = ToRegister(instr->temp_vector());
- DCHECK(vector.is(LoadIC::VectorRegister()));
- __ mov(vector, instr->hydrogen()->feedback_vector());
- // No need to allocate this register.
- DCHECK(LoadIC::SlotRegister().is(eax));
- __ mov(LoadIC::SlotRegister(),
- Immediate(Smi::FromInt(instr->hydrogen()->slot())));
+ EmitVectorLoadICRegisters<LLoadKeyedGeneric>(instr);
}
Handle<Code> ic = isolate()->builtins()->KeyedLoadIC_Initialize();
=======================================
--- /branches/bleeding_edge/src/ia32/lithium-codegen-ia32.h Mon Aug 4
11:34:54 2014 UTC
+++ /branches/bleeding_edge/src/ia32/lithium-codegen-ia32.h Mon Aug 25
14:12:12 2014 UTC
@@ -319,6 +319,9 @@
void DoStoreKeyedFixedDoubleArray(LStoreKeyed* instr);
void DoStoreKeyedFixedArray(LStoreKeyed* instr);
+ template <class T>
+ void EmitVectorLoadICRegisters(T* instr);
+
void EmitReturn(LReturn* instr, bool dynamic_frame_alignment);
// Emits code for pushing either a tagged constant, a (non-double)
=======================================
--- /branches/bleeding_edge/src/x64/lithium-codegen-x64.cc Mon Aug 25
07:02:19 2014 UTC
+++ /branches/bleeding_edge/src/x64/lithium-codegen-x64.cc Mon Aug 25
14:12:12 2014 UTC
@@ -2844,6 +2844,18 @@
DeoptimizeIf(equal, instr->environment());
}
}
+
+
+template <class T>
+void LCodeGen::EmitVectorLoadICRegisters(T* instr) {
+ DCHECK(FLAG_vector_ics);
+ Register vector = ToRegister(instr->temp_vector());
+ DCHECK(vector.is(LoadIC::VectorRegister()));
+ __ Move(vector, instr->hydrogen()->feedback_vector());
+ // No need to allocate this register.
+ DCHECK(LoadIC::SlotRegister().is(rax));
+ __ Move(LoadIC::SlotRegister(), Smi::FromInt(instr->hydrogen()->slot()));
+}
void LCodeGen::DoLoadGlobalGeneric(LLoadGlobalGeneric* instr) {
@@ -2853,12 +2865,7 @@
__ Move(LoadIC::NameRegister(), instr->name());
if (FLAG_vector_ics) {
- Register vector = ToRegister(instr->temp_vector());
- DCHECK(vector.is(LoadIC::VectorRegister()));
- __ Move(vector, instr->hydrogen()->feedback_vector());
- // No need to allocate this register.
- DCHECK(LoadIC::SlotRegister().is(rax));
- __ Move(LoadIC::SlotRegister(),
Smi::FromInt(instr->hydrogen()->slot()));
+ EmitVectorLoadICRegisters<LLoadGlobalGeneric>(instr);
}
ContextualMode mode = instr->for_typeof() ? NOT_CONTEXTUAL : CONTEXTUAL;
Handle<Code> ic = LoadIC::initialize_stub(isolate(), mode);
@@ -3001,12 +3008,7 @@
__ Move(LoadIC::NameRegister(), instr->name());
if (FLAG_vector_ics) {
- Register vector = ToRegister(instr->temp_vector());
- DCHECK(vector.is(LoadIC::VectorRegister()));
- __ Move(vector, instr->hydrogen()->feedback_vector());
- // No need to allocate this register.
- DCHECK(LoadIC::SlotRegister().is(rax));
- __ Move(LoadIC::SlotRegister(),
Smi::FromInt(instr->hydrogen()->slot()));
+ EmitVectorLoadICRegisters<LLoadNamedGeneric>(instr);
}
Handle<Code> ic = LoadIC::initialize_stub(isolate(), NOT_CONTEXTUAL);
CallCode(ic, RelocInfo::CODE_TARGET, instr);
@@ -3289,12 +3291,7 @@
DCHECK(ToRegister(instr->key()).is(LoadIC::NameRegister()));
if (FLAG_vector_ics) {
- Register vector = ToRegister(instr->temp_vector());
- DCHECK(vector.is(LoadIC::VectorRegister()));
- __ Move(vector, instr->hydrogen()->feedback_vector());
- // No need to allocate this register.
- DCHECK(LoadIC::SlotRegister().is(rax));
- __ Move(LoadIC::SlotRegister(),
Smi::FromInt(instr->hydrogen()->slot()));
+ EmitVectorLoadICRegisters<LLoadKeyedGeneric>(instr);
}
Handle<Code> ic = isolate()->builtins()->KeyedLoadIC_Initialize();
=======================================
--- /branches/bleeding_edge/src/x64/lithium-codegen-x64.h Mon Aug 4
11:34:54 2014 UTC
+++ /branches/bleeding_edge/src/x64/lithium-codegen-x64.h Mon Aug 25
14:12:12 2014 UTC
@@ -314,6 +314,10 @@
void DoStoreKeyedExternalArray(LStoreKeyed* instr);
void DoStoreKeyedFixedDoubleArray(LStoreKeyed* instr);
void DoStoreKeyedFixedArray(LStoreKeyed* instr);
+
+ template <class T>
+ void EmitVectorLoadICRegisters(T* instr);
+
#ifdef _MSC_VER
// On windows, you may not access the stack more than one page below
// the most recently mapped page. To make the allocated area randomly
--
--
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