Reviewers: danno, mvstanton, paul.l..., gergely.kis.imgtec,
akos.palfi.imgtec, dusmil.imgtec,
Description:
MIPS: Convert KeyedLoad indexed interceptor case to a Handler.
Port r24042 (eb9b9ec)
Original commit message:
Currently, KeyedLoads on objects with indexed interceptors are handled with
a
special stub. Instead, key on the map and handler mechanism for more uniform
treatment.
BUG=
Please review this at https://codereview.chromium.org/579273002/
SVN Base: https://v8.googlecode.com/svn/branches/bleeding_edge
Affected files (+26, -40 lines):
M src/ic/mips64/ic-mips64.cc
M src/mips64/code-stubs-mips64.cc
Index: src/ic/mips64/ic-mips64.cc
diff --git a/src/ic/mips64/ic-mips64.cc b/src/ic/mips64/ic-mips64.cc
index
0095d14c52b3a0e64e06f328687e54c4e39f5bd9..0ac35ffbc0e1d5923818c68980fbbfd3ebdf6e9a
100644
--- a/src/ic/mips64/ic-mips64.cc
+++ b/src/ic/mips64/ic-mips64.cc
@@ -896,46 +896,6 @@ void KeyedStoreIC::GenerateGeneric(MacroAssembler*
masm,
}
-void KeyedLoadIC::GenerateIndexedInterceptor(MacroAssembler* masm) {
- // Return address is in ra.
- Label slow;
-
- Register receiver = LoadDescriptor::ReceiverRegister();
- Register key = LoadDescriptor::NameRegister();
- Register scratch1 = a3;
- Register scratch2 = a4;
- DCHECK(!scratch1.is(receiver) && !scratch1.is(key));
- DCHECK(!scratch2.is(receiver) && !scratch2.is(key));
-
- // Check that the receiver isn't a smi.
- __ JumpIfSmi(receiver, &slow);
-
- // Check that the key is an array index, that is Uint32.
- __ And(a4, key, Operand(kSmiTagMask | kSmiSignMask));
- __ Branch(&slow, ne, a4, Operand(zero_reg));
-
- // Get the map of the receiver.
- __ ld(scratch1, FieldMemOperand(receiver, HeapObject::kMapOffset));
-
- // Check that it has indexed interceptor and access checks
- // are not enabled for this object.
- __ lbu(scratch2, FieldMemOperand(scratch1, Map::kBitFieldOffset));
- __ And(scratch2, scratch2, Operand(kSlowCaseBitFieldMask));
- __ Branch(&slow, ne, scratch2, Operand(1 <<
Map::kHasIndexedInterceptor));
- // Everything is fine, call runtime.
- __ Push(receiver, key); // Receiver, key.
-
- // Perform tail call to the entry.
- __ TailCallExternalReference(
- ExternalReference(IC_Utility(kLoadElementWithInterceptor),
- masm->isolate()),
- 2, 1);
-
- __ bind(&slow);
- GenerateMiss(masm);
-}
-
-
void KeyedStoreIC::GenerateMiss(MacroAssembler* masm) {
// Push receiver, key and value for runtime call.
__ Push(StoreDescriptor::ReceiverRegister(),
StoreDescriptor::NameRegister(),
Index: src/mips64/code-stubs-mips64.cc
diff --git a/src/mips64/code-stubs-mips64.cc
b/src/mips64/code-stubs-mips64.cc
index
9ae9102914cfa668ba70ebaddac6d221be587698..9976af16743c1c8030f7447ab6b474d32d13bd9f
100644
--- a/src/mips64/code-stubs-mips64.cc
+++ b/src/mips64/code-stubs-mips64.cc
@@ -1894,6 +1894,32 @@ void
ArgumentsAccessStub::GenerateNewSloppyFast(MacroAssembler* masm) {
}
+void LoadIndexedInterceptorStub::Generate(MacroAssembler* masm) {
+ // Return address is in ra.
+ Label slow;
+
+ Register receiver = LoadDescriptor::ReceiverRegister();
+ Register key = LoadDescriptor::NameRegister();
+
+ // Check that the key is an array index, that is Uint32.
+ __ And(t0, key, Operand(kSmiTagMask | kSmiSignMask));
+ __ Branch(&slow, ne, t0, Operand(zero_reg));
+
+ // Everything is fine, call runtime.
+ __ Push(receiver, key); // Receiver, key.
+
+ // Perform tail call to the entry.
+ __ TailCallExternalReference(
+ ExternalReference(IC_Utility(IC::kLoadElementWithInterceptor),
+ masm->isolate()),
+ 2, 1);
+
+ __ bind(&slow);
+ PropertyAccessCompiler::TailCallBuiltin(
+ masm, PropertyAccessCompiler::MissBuiltin(Code::KEYED_LOAD_IC));
+}
+
+
void ArgumentsAccessStub::GenerateNewStrict(MacroAssembler* masm) {
// sp[0] : number of parameters
// sp[4] : receiver displacement
--
--
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