Revision: 24177
Author: [email protected]
Date: Wed Sep 24 10:24:19 2014 UTC
Log: Extend JSBuiltinReducer to cover Math.sqrt as well.
[email protected]
TEST=compiler-unittests/JSBuiltinReducerTest.MathSqrt
Review URL: https://codereview.chromium.org/595963002
https://code.google.com/p/v8/source/detail?r=24177
Modified:
/branches/bleeding_edge/src/compiler/arm/code-generator-arm.cc
/branches/bleeding_edge/src/compiler/arm/instruction-codes-arm.h
/branches/bleeding_edge/src/compiler/arm/instruction-selector-arm.cc
/branches/bleeding_edge/src/compiler/arm64/code-generator-arm64.cc
/branches/bleeding_edge/src/compiler/arm64/instruction-codes-arm64.h
/branches/bleeding_edge/src/compiler/arm64/instruction-selector-arm64.cc
/branches/bleeding_edge/src/compiler/graph-unittest.cc
/branches/bleeding_edge/src/compiler/graph-unittest.h
/branches/bleeding_edge/src/compiler/ia32/code-generator-ia32.cc
/branches/bleeding_edge/src/compiler/ia32/instruction-codes-ia32.h
/branches/bleeding_edge/src/compiler/ia32/instruction-selector-ia32.cc
/branches/bleeding_edge/src/compiler/instruction-selector.cc
/branches/bleeding_edge/src/compiler/js-builtin-reducer-unittest.cc
/branches/bleeding_edge/src/compiler/js-builtin-reducer.cc
/branches/bleeding_edge/src/compiler/js-builtin-reducer.h
/branches/bleeding_edge/src/compiler/machine-operator-unittest.cc
/branches/bleeding_edge/src/compiler/machine-operator.cc
/branches/bleeding_edge/src/compiler/machine-operator.h
/branches/bleeding_edge/src/compiler/opcodes.h
/branches/bleeding_edge/src/compiler/simplified-lowering.cc
/branches/bleeding_edge/src/compiler/x64/code-generator-x64.cc
/branches/bleeding_edge/src/compiler/x64/instruction-codes-x64.h
/branches/bleeding_edge/src/compiler/x64/instruction-selector-x64.cc
=======================================
--- /branches/bleeding_edge/src/compiler/arm/code-generator-arm.cc Tue Sep
23 08:46:18 2014 UTC
+++ /branches/bleeding_edge/src/compiler/arm/code-generator-arm.cc Wed Sep
24 10:24:19 2014 UTC
@@ -323,6 +323,9 @@
case kArmVnegF64:
__ vneg(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
break;
+ case kArmVsqrtF64:
+ __ vsqrt(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
+ break;
case kArmVcvtF64S32: {
SwVfpRegister scratch = kScratchDoubleReg.low();
__ vmov(scratch, i.InputRegister(0));
=======================================
--- /branches/bleeding_edge/src/compiler/arm/instruction-codes-arm.h Wed
Aug 27 06:25:02 2014 UTC
+++ /branches/bleeding_edge/src/compiler/arm/instruction-codes-arm.h Wed
Sep 24 10:24:19 2014 UTC
@@ -41,6 +41,7 @@
V(ArmVdivF64) \
V(ArmVmodF64) \
V(ArmVnegF64) \
+ V(ArmVsqrtF64) \
V(ArmVcvtF64S32) \
V(ArmVcvtF64U32) \
V(ArmVcvtS32F64) \
=======================================
--- /branches/bleeding_edge/src/compiler/arm/instruction-selector-arm.cc
Mon Sep 22 13:56:03 2014 UTC
+++ /branches/bleeding_edge/src/compiler/arm/instruction-selector-arm.cc
Wed Sep 24 10:24:19 2014 UTC
@@ -90,6 +90,7 @@
case kArmVdivF64:
case kArmVmodF64:
case kArmVnegF64:
+ case kArmVsqrtF64:
case kArmVcvtF64S32:
case kArmVcvtF64U32:
case kArmVcvtS32F64:
@@ -766,6 +767,12 @@
Emit(kArmVmodF64, g.DefineAsFixed(node, d0),
g.UseFixed(node->InputAt(0), d0),
g.UseFixed(node->InputAt(1), d1))->MarkAsCall();
}
+
+
+void InstructionSelector::VisitFloat64Sqrt(Node* node) {
+ ArmOperandGenerator g(this);
+ Emit(kArmVsqrtF64, g.DefineAsRegister(node),
g.UseRegister(node->InputAt(0)));
+}
void InstructionSelector::VisitCall(Node* call, BasicBlock* continuation,
=======================================
--- /branches/bleeding_edge/src/compiler/arm64/code-generator-arm64.cc Tue
Sep 23 08:46:18 2014 UTC
+++ /branches/bleeding_edge/src/compiler/arm64/code-generator-arm64.cc Wed
Sep 24 10:24:19 2014 UTC
@@ -373,6 +373,9 @@
0, 2);
break;
}
+ case kArm64Float64Sqrt:
+ __ Fsqrt(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
+ break;
case kArm64Float64ToInt32:
__ Fcvtzs(i.OutputRegister32(), i.InputDoubleRegister(0));
break;
=======================================
--- /branches/bleeding_edge/src/compiler/arm64/instruction-codes-arm64.h
Tue Sep 9 14:13:51 2014 UTC
+++ /branches/bleeding_edge/src/compiler/arm64/instruction-codes-arm64.h
Wed Sep 24 10:24:19 2014 UTC
@@ -62,6 +62,7 @@
V(Arm64Float64Mul) \
V(Arm64Float64Div) \
V(Arm64Float64Mod) \
+ V(Arm64Float64Sqrt) \
V(Arm64Float64ToInt32) \
V(Arm64Float64ToUint32) \
V(Arm64Int32ToFloat64) \
=======================================
---
/branches/bleeding_edge/src/compiler/arm64/instruction-selector-arm64.cc
Mon Sep 22 13:56:03 2014 UTC
+++
/branches/bleeding_edge/src/compiler/arm64/instruction-selector-arm64.cc
Wed Sep 24 10:24:19 2014 UTC
@@ -504,6 +504,13 @@
g.UseFixed(node->InputAt(0), d0),
g.UseFixed(node->InputAt(1), d1))->MarkAsCall();
}
+
+
+void InstructionSelector::VisitFloat64Sqrt(Node* node) {
+ Arm64OperandGenerator g(this);
+ Emit(kArm64Float64Sqrt, g.DefineAsRegister(node),
+ g.UseRegister(node->InputAt(0)));
+}
void InstructionSelector::VisitInt32AddWithOverflow(Node* node,
=======================================
--- /branches/bleeding_edge/src/compiler/graph-unittest.cc Tue Sep 23
11:40:00 2014 UTC
+++ /branches/bleeding_edge/src/compiler/graph-unittest.cc Wed Sep 24
10:24:19 2014 UTC
@@ -771,6 +771,7 @@
IS_UNOP_MATCHER(ChangeUint32ToUint64)
IS_UNOP_MATCHER(TruncateFloat64ToInt32)
IS_UNOP_MATCHER(TruncateInt64ToInt32)
+IS_UNOP_MATCHER(Float64Sqrt)
#undef IS_UNOP_MATCHER
} // namespace compiler
=======================================
--- /branches/bleeding_edge/src/compiler/graph-unittest.h Tue Sep 23
11:40:00 2014 UTC
+++ /branches/bleeding_edge/src/compiler/graph-unittest.h Wed Sep 24
10:24:19 2014 UTC
@@ -131,6 +131,7 @@
Matcher<Node*> IsChangeUint32ToUint64(const Matcher<Node*>& input_matcher);
Matcher<Node*> IsTruncateFloat64ToInt32(const Matcher<Node*>&
input_matcher);
Matcher<Node*> IsTruncateInt64ToInt32(const Matcher<Node*>& input_matcher);
+Matcher<Node*> IsFloat64Sqrt(const Matcher<Node*>& input_matcher);
} // namespace compiler
} // namespace internal
=======================================
--- /branches/bleeding_edge/src/compiler/ia32/code-generator-ia32.cc Tue
Sep 23 08:46:18 2014 UTC
+++ /branches/bleeding_edge/src/compiler/ia32/code-generator-ia32.cc Wed
Sep 24 10:24:19 2014 UTC
@@ -285,6 +285,9 @@
__ add(esp, Immediate(kDoubleSize));
break;
}
+ case kSSEFloat64Sqrt:
+ __ sqrtsd(i.OutputDoubleRegister(), i.InputOperand(0));
+ break;
case kSSEFloat64ToInt32:
__ cvttsd2si(i.OutputRegister(), i.InputOperand(0));
break;
=======================================
--- /branches/bleeding_edge/src/compiler/ia32/instruction-codes-ia32.h Wed
Aug 27 06:25:02 2014 UTC
+++ /branches/bleeding_edge/src/compiler/ia32/instruction-codes-ia32.h Wed
Sep 24 10:24:19 2014 UTC
@@ -34,6 +34,7 @@
V(SSEFloat64Mul) \
V(SSEFloat64Div) \
V(SSEFloat64Mod) \
+ V(SSEFloat64Sqrt) \
V(SSEFloat64ToInt32) \
V(SSEFloat64ToUint32) \
V(SSEInt32ToFloat64) \
=======================================
--- /branches/bleeding_edge/src/compiler/ia32/instruction-selector-ia32.cc
Mon Sep 22 13:56:03 2014 UTC
+++ /branches/bleeding_edge/src/compiler/ia32/instruction-selector-ia32.cc
Wed Sep 24 10:24:19 2014 UTC
@@ -415,6 +415,12 @@
g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)), 1,
temps);
}
+
+
+void InstructionSelector::VisitFloat64Sqrt(Node* node) {
+ IA32OperandGenerator g(this);
+ Emit(kSSEFloat64Sqrt, g.DefineAsRegister(node), g.Use(node->InputAt(0)));
+}
void InstructionSelector::VisitInt32AddWithOverflow(Node* node,
=======================================
--- /branches/bleeding_edge/src/compiler/instruction-selector.cc Thu Sep 18
08:56:52 2014 UTC
+++ /branches/bleeding_edge/src/compiler/instruction-selector.cc Wed Sep 24
10:24:19 2014 UTC
@@ -596,6 +596,8 @@
return MarkAsDouble(node), VisitFloat64Div(node);
case IrOpcode::kFloat64Mod:
return MarkAsDouble(node), VisitFloat64Mod(node);
+ case IrOpcode::kFloat64Sqrt:
+ return MarkAsDouble(node), VisitFloat64Sqrt(node);
case IrOpcode::kFloat64Equal:
return VisitFloat64Equal(node);
case IrOpcode::kFloat64LessThan:
=======================================
--- /branches/bleeding_edge/src/compiler/js-builtin-reducer-unittest.cc Tue
Sep 23 11:40:00 2014 UTC
+++ /branches/bleeding_edge/src/compiler/js-builtin-reducer-unittest.cc Wed
Sep 24 10:24:19 2014 UTC
@@ -57,6 +57,26 @@
Type::OrderedNumber(), Type::Number()};
} // namespace
+
+
+//
-----------------------------------------------------------------------------
+// Math.sqrt
+
+
+TEST_F(JSBuiltinReducerTest, MathSqrt) {
+ Handle<JSFunction> f(isolate()->context()->math_sqrt_fun());
+
+ TRACED_FOREACH(Type*, t0, kNumberTypes) {
+ Node* p0 = Parameter(t0, 0);
+ Node* fun = HeapConstant(Unique<HeapObject>::CreateUninitialized(f));
+ Node* call = graph()->NewNode(javascript()->Call(3,
NO_CALL_FUNCTION_FLAGS),
+ fun, UndefinedConstant(), p0);
+ Reduction r = Reduce(call);
+
+ ASSERT_TRUE(r.Changed());
+ EXPECT_THAT(r.replacement(), IsFloat64Sqrt(p0));
+ }
+}
//
-----------------------------------------------------------------------------
@@ -71,7 +91,7 @@
fun, UndefinedConstant());
Reduction r = Reduce(call);
- EXPECT_TRUE(r.Changed());
+ ASSERT_TRUE(r.Changed());
EXPECT_THAT(r.replacement(), IsNumberConstant(-V8_INFINITY));
}
@@ -86,7 +106,7 @@
fun, UndefinedConstant(), p0);
Reduction r = Reduce(call);
- EXPECT_TRUE(r.Changed());
+ ASSERT_TRUE(r.Changed());
EXPECT_THAT(r.replacement(), p0);
}
}
@@ -107,7 +127,7 @@
if (t0->Is(Type::Integral32()) && t1->Is(Type::Integral32())) {
Capture<Node*> branch;
- EXPECT_TRUE(r.Changed());
+ ASSERT_TRUE(r.Changed());
EXPECT_THAT(
r.replacement(),
IsPhi(kMachNone, p1, p0,
@@ -116,7 +136,7 @@
IsBranch(IsNumberLessThan(p0,
p1),
graph()->start()))))));
} else {
- EXPECT_FALSE(r.Changed());
+ ASSERT_FALSE(r.Changed());
EXPECT_EQ(IrOpcode::kJSCallFunction, call->opcode());
}
}
@@ -142,10 +162,10 @@
Reduction r = Reduce(call);
if (t0->Is(Type::Integral32()) && t1->Is(Type::Integral32())) {
- EXPECT_TRUE(r.Changed());
+ ASSERT_TRUE(r.Changed());
EXPECT_THAT(r.replacement(), IsInt32Mul(p0, p1));
} else {
- EXPECT_FALSE(r.Changed());
+ ASSERT_FALSE(r.Changed());
EXPECT_EQ(IrOpcode::kJSCallFunction, call->opcode());
}
}
=======================================
--- /branches/bleeding_edge/src/compiler/js-builtin-reducer.cc Tue Sep 23
08:16:54 2014 UTC
+++ /branches/bleeding_edge/src/compiler/js-builtin-reducer.cc Wed Sep 24
10:24:19 2014 UTC
@@ -93,6 +93,18 @@
private:
Node* node_;
};
+
+
+// ECMA-262, section 15.8.2.17.
+Reduction JSBuiltinReducer::ReduceMathSqrt(Node* node) {
+ JSCallReduction r(node);
+ if (r.InputsMatchOne(Type::Number())) {
+ // Math.sqrt(a:number) -> Float64Sqrt(a)
+ Node* value = graph()->NewNode(machine()->Float64Sqrt(), r.left());
+ return Replace(value);
+ }
+ return NoChange();
+}
// ECMA-262, section 15.8.2.11.
@@ -145,6 +157,8 @@
// Dispatch according to the BuiltinFunctionId if present.
if (!r.HasBuiltinFunctionId()) return NoChange();
switch (r.GetBuiltinFunctionId()) {
+ case kMathSqrt:
+ return ReplaceWithPureReduction(node, ReduceMathSqrt(node));
case kMathMax:
return ReplaceWithPureReduction(node, ReduceMathMax(node));
case kMathImul:
=======================================
--- /branches/bleeding_edge/src/compiler/js-builtin-reducer.h Tue Sep 23
08:16:54 2014 UTC
+++ /branches/bleeding_edge/src/compiler/js-builtin-reducer.h Wed Sep 24
10:24:19 2014 UTC
@@ -30,6 +30,7 @@
MachineOperatorBuilder* machine() const { return jsgraph_->machine(); }
SimplifiedOperatorBuilder* simplified() { return &simplified_; }
+ Reduction ReduceMathSqrt(Node* node);
Reduction ReduceMathMax(Node* node);
Reduction ReduceMathImul(Node* node);
=======================================
--- /branches/bleeding_edge/src/compiler/machine-operator-unittest.cc Mon
Sep 22 11:42:10 2014 UTC
+++ /branches/bleeding_edge/src/compiler/machine-operator-unittest.cc Wed
Sep 24 10:24:19 2014 UTC
@@ -213,8 +213,8 @@
PURE(TruncateInt64ToInt32, 1, 1), PURE(Float64Add, 2, 1),
PURE(Float64Sub, 2, 1), PURE(Float64Mul, 2, 1),
PURE(Float64Div, 2, 1), PURE(Float64Mod, 2, 1),
- PURE(Float64Equal, 2, 1), PURE(Float64LessThan, 2, 1),
- PURE(Float64LessThanOrEqual, 2, 1)
+ PURE(Float64Sqrt, 1, 1), PURE(Float64Equal, 2, 1),
+ PURE(Float64LessThan, 2, 1), PURE(Float64LessThanOrEqual, 2,
1)
#undef PURE
};
=======================================
--- /branches/bleeding_edge/src/compiler/machine-operator.cc Mon Sep 22
11:42:10 2014 UTC
+++ /branches/bleeding_edge/src/compiler/machine-operator.cc Wed Sep 24
10:24:19 2014 UTC
@@ -112,6 +112,7 @@
V(Float64Mul, Operator::kCommutative, 2,
1) \
V(Float64Div, Operator::kNoProperties, 2,
1) \
V(Float64Mod, Operator::kNoProperties, 2,
1) \
+ V(Float64Sqrt, Operator::kNoProperties, 1,
1) \
V(Float64Equal, Operator::kCommutative, 2,
1) \
V(Float64LessThan, Operator::kNoProperties, 2,
1) \
V(Float64LessThanOrEqual, Operator::kNoProperties, 2, 1)
=======================================
--- /branches/bleeding_edge/src/compiler/machine-operator.h Mon Sep 22
11:42:10 2014 UTC
+++ /branches/bleeding_edge/src/compiler/machine-operator.h Wed Sep 24
10:24:19 2014 UTC
@@ -129,6 +129,7 @@
const Operator* Float64Mul();
const Operator* Float64Div();
const Operator* Float64Mod();
+ const Operator* Float64Sqrt();
// Floating point comparisons complying to IEEE 754.
const Operator* Float64Equal();
=======================================
--- /branches/bleeding_edge/src/compiler/opcodes.h Mon Sep 22 11:42:10 2014
UTC
+++ /branches/bleeding_edge/src/compiler/opcodes.h Wed Sep 24 10:24:19 2014
UTC
@@ -218,6 +218,7 @@
V(Float64Mul) \
V(Float64Div) \
V(Float64Mod) \
+ V(Float64Sqrt) \
V(Float64Equal) \
V(Float64LessThan) \
V(Float64LessThanOrEqual)
=======================================
--- /branches/bleeding_edge/src/compiler/simplified-lowering.cc Wed Sep 24
09:28:56 2014 UTC
+++ /branches/bleeding_edge/src/compiler/simplified-lowering.cc Wed Sep 24
10:24:19 2014 UTC
@@ -724,6 +724,8 @@
case IrOpcode::kFloat64Div:
case IrOpcode::kFloat64Mod:
return VisitFloat64Binop(node);
+ case IrOpcode::kFloat64Sqrt:
+ return VisitUnop(node, kMachFloat64, kMachFloat64);
case IrOpcode::kFloat64Equal:
case IrOpcode::kFloat64LessThan:
case IrOpcode::kFloat64LessThanOrEqual:
=======================================
--- /branches/bleeding_edge/src/compiler/x64/code-generator-x64.cc Tue Sep
23 08:46:18 2014 UTC
+++ /branches/bleeding_edge/src/compiler/x64/code-generator-x64.cc Wed Sep
24 10:24:19 2014 UTC
@@ -447,6 +447,15 @@
__ addq(rsp, Immediate(kDoubleSize));
break;
}
+ case kSSEFloat64Sqrt: {
+ RegisterOrOperand input = i.InputRegisterOrOperand(0);
+ if (input.type == kDoubleRegister) {
+ __ sqrtsd(i.OutputDoubleRegister(), input.double_reg);
+ } else {
+ __ sqrtsd(i.OutputDoubleRegister(), input.operand);
+ }
+ break;
+ }
case kSSEFloat64ToInt32: {
RegisterOrOperand input = i.InputRegisterOrOperand(0);
if (input.type == kDoubleRegister) {
=======================================
--- /branches/bleeding_edge/src/compiler/x64/instruction-codes-x64.h Wed
Aug 27 06:25:02 2014 UTC
+++ /branches/bleeding_edge/src/compiler/x64/instruction-codes-x64.h Wed
Sep 24 10:24:19 2014 UTC
@@ -50,6 +50,7 @@
V(SSEFloat64Mul) \
V(SSEFloat64Div) \
V(SSEFloat64Mod) \
+ V(SSEFloat64Sqrt) \
V(SSEFloat64ToInt32) \
V(SSEFloat64ToUint32) \
V(SSEInt32ToFloat64) \
=======================================
--- /branches/bleeding_edge/src/compiler/x64/instruction-selector-x64.cc
Mon Sep 22 13:56:03 2014 UTC
+++ /branches/bleeding_edge/src/compiler/x64/instruction-selector-x64.cc
Wed Sep 24 10:24:19 2014 UTC
@@ -557,6 +557,12 @@
g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)), 1,
temps);
}
+
+
+void InstructionSelector::VisitFloat64Sqrt(Node* node) {
+ X64OperandGenerator g(this);
+ Emit(kSSEFloat64Sqrt, g.DefineAsRegister(node), g.Use(node->InputAt(0)));
+}
void InstructionSelector::VisitInt32AddWithOverflow(Node* node,
--
--
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