Reviewers: danno, Benedikt Meurer, paul.l..., gergely.kis.imgtec,
akos.palfi.imgtec, dusmil.imgtec,
Description:
MIPS: [turbofan] Add backend support for float32.
Port r24179 (41b81c2)
LOG=n
BUG=v8:3589
TEST=compiler-unittests,cctest
Please review this at https://codereview.chromium.org/601783002/
SVN Base: https://v8.googlecode.com/svn/branches/bleeding_edge
Affected files (+18, -0 lines):
M src/mips/assembler-mips.h
M src/mips/assembler-mips-inl.h
M src/mips64/assembler-mips64.h
M src/mips64/assembler-mips64-inl.h
Index: src/mips/assembler-mips-inl.h
diff --git a/src/mips/assembler-mips-inl.h b/src/mips/assembler-mips-inl.h
index
2666f6ada7c0006999fb2c9fd12f3a4c7bb8cec2..1cd9361e9a28a461e4122f852d8191ff353a8f66
100644
--- a/src/mips/assembler-mips-inl.h
+++ b/src/mips/assembler-mips-inl.h
@@ -99,6 +99,11 @@ int DoubleRegister::NumAllocatableRegisters() {
}
+int DoubleRegister::NumAllocatableAliasedRegisters() {
+ return NumAllocatableRegisters();
+}
+
+
int FPURegister::ToAllocationIndex(FPURegister reg) {
DCHECK(reg.code() % 2 == 0);
DCHECK(reg.code() / 2 < kMaxNumAllocatableRegisters);
Index: src/mips/assembler-mips.h
diff --git a/src/mips/assembler-mips.h b/src/mips/assembler-mips.h
index
5cdf16ac4ae8435fca6b327e191f446de1c4ca33..c6b12b76d7a8002477eb7791081ee861b97e4d4c
100644
--- a/src/mips/assembler-mips.h
+++ b/src/mips/assembler-mips.h
@@ -222,6 +222,10 @@ struct FPURegister {
inline static int NumRegisters();
inline static int NumAllocatableRegisters();
+
+ // TODO(turbofan): Proper support for float32.
+ inline static int NumAllocatableAliasedRegisters();
+
inline static int ToAllocationIndex(FPURegister reg);
static const char* AllocationIndexToString(int index);
Index: src/mips64/assembler-mips64-inl.h
diff --git a/src/mips64/assembler-mips64-inl.h
b/src/mips64/assembler-mips64-inl.h
index
de294ee6653408126d85bd46a4016623626fa497..76dd801af591b259d3de1b21601401806dcd687e
100644
--- a/src/mips64/assembler-mips64-inl.h
+++ b/src/mips64/assembler-mips64-inl.h
@@ -99,6 +99,11 @@ int DoubleRegister::NumAllocatableRegisters() {
}
+int DoubleRegister::NumAllocatableAliasedRegisters() {
+ return NumAllocatableRegisters();
+}
+
+
int FPURegister::ToAllocationIndex(FPURegister reg) {
DCHECK(reg.code() % 2 == 0);
DCHECK(reg.code() / 2 < kMaxNumAllocatableRegisters);
Index: src/mips64/assembler-mips64.h
diff --git a/src/mips64/assembler-mips64.h b/src/mips64/assembler-mips64.h
index
5c754f495054bafffc8e2935ac973c9832577a36..b296d517584368d183cbfdbfb70d738a64de3d90
100644
--- a/src/mips64/assembler-mips64.h
+++ b/src/mips64/assembler-mips64.h
@@ -211,6 +211,10 @@ struct FPURegister {
inline static int NumRegisters();
inline static int NumAllocatableRegisters();
+
+ // TODO(turbofan): Proper support for float32.
+ inline static int NumAllocatableAliasedRegisters();
+
inline static int ToAllocationIndex(FPURegister reg);
static const char* AllocationIndexToString(int index);
--
--
v8-dev mailing list
[email protected]
http://groups.google.com/group/v8-dev
---
You received this message because you are subscribed to the Google Groups "v8-dev" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to [email protected].
For more options, visit https://groups.google.com/d/optout.
