Status: New
Owner: ----
CC: [email protected],  [email protected],  [email protected]
Labels: Type-Bug Priority-Medium

New issue 436 by [email protected]: Numeric results are wrong on some  
systems due to x87 extended double precision
http://code.google.com/p/v8/issues/detail?id=436

V8 for IA-32 uses x87 instructions for floating-point operations.  This
renders the results susceptible to the state of the x87 floating point
control word.

x87 operations can be performed with varying amounts of precision:

  - single (24-bit) precision in a 32-bit field, matching "float"
  - double (53-bit) precision in a 64-bit field, matching "double"
  - double extended (64-bit) precision in an 80-bit field

The CPU default is double extended precision.  Windows on IA-32 prefers
to use double.  Mac OS X and Linux on IA-32 use double extended.

ECMA-262 section 8.5 specifies the use of the double precision format.
(http://www.ecma-international.org/publications/standards/Ecma-
262.htm)

The following produces different results when run on Windows compared
to Linux and Mac:

x = 9007199254740994; // 2^53 + 2
y = 1 - 1/65536;
z = x + y;
d = z - x;

or, run it in a browser: http://www.vinc17.org/research/extended.en.html,
scroll down to "JavaScript (ECMAScript)", and look for "Test of the  
Javascript
arithmetic of your browser: 2. The number 0 is the correct result."  This
page also contains more information on the problem.

The result with V8 on IA-32 with Windows is 0.  On Mac OS X and Linux, 2.
V8 on x86-64 with Linux gives 0.  V8's x86-64 code generators currently
emit SSE2 instructions for floating-point operations, using "double"
precision regardless of the state of the x87 FPU control word.

32-bit Firefox and Safari for Mac OS X both give 0.

There are three possible solutions to the problem:

1. Expect V8 consumers to set up the x87 control word properly on threads
that will host V8.  (I can make this change for Chromium render threads,
for example.)

2. Set the x87 control word in some bit of V8 initialization.

3. Use SSE2 double-precision floating-point instructions in the IA-32 code
generators when SSE2 is available.  This will leave the problem unresolved
for CPUs that do not offer SSE2.  I don't know whether SSE2 is considered a
baseline requirement for V8.

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