Reviewers: Benedikt Meurer, dcarney, titzer, danno,
Message:
PTAL
Description:
X64: replace explicit zero-extend with runtime assert
Since the input float64 is in the range of [0, 2^32-1], the upper 32 bits of
output register
should be zero.
BUG=
Please review this at https://codereview.chromium.org/644993002/
SVN Base: https://v8.googlecode.com/svn/branches/bleeding_edge
Affected files (+3, -4 lines):
M src/compiler/x64/code-generator-x64.cc
Index: src/compiler/x64/code-generator-x64.cc
diff --git a/src/compiler/x64/code-generator-x64.cc
b/src/compiler/x64/code-generator-x64.cc
index
de8956e01d248a1ce47b76b297fae2aee4e5080f..cb302e8aed8a07a9bd3ae8e96243ebebece1c8c2
100644
--- a/src/compiler/x64/code-generator-x64.cc
+++ b/src/compiler/x64/code-generator-x64.cc
@@ -417,16 +417,15 @@ void
CodeGenerator::AssembleArchInstruction(Instruction* instr) {
__ cvttsd2si(i.OutputRegister(), i.InputOperand(0));
}
break;
- case kSSEFloat64ToUint32:
+ case kSSEFloat64ToUint32: {
if (instr->InputAt(0)->IsDoubleRegister()) {
__ cvttsd2siq(i.OutputRegister(), i.InputDoubleRegister(0));
} else {
__ cvttsd2siq(i.OutputRegister(), i.InputOperand(0));
}
- __ andl(i.OutputRegister(), i.OutputRegister()); // clear upper
bits.
- // TODO(turbofan): generated code should not look at the upper 32
bits
- // of the result, but those bits could escape to the outside world.
+ __ AssertZeroExtended(i.OutputRegister());
break;
+ }
case kSSEInt32ToFloat64:
if (instr->InputAt(0)->IsRegister()) {
__ cvtlsi2sd(i.OutputDoubleRegister(), i.InputRegister(0));
--
--
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