Revision: 24541
Author: [email protected]
Date: Mon Oct 13 07:12:57 2014 UTC
Log: [turbofan] IA: TruncateFloat64ToFloat32 supports mem operand
BUG=
[email protected]
Review URL: https://codereview.chromium.org/639283003
https://code.google.com/p/v8/source/detail?r=24541
Modified:
/branches/bleeding_edge/src/compiler/ia32/code-generator-ia32.cc
/branches/bleeding_edge/src/compiler/ia32/instruction-selector-ia32.cc
/branches/bleeding_edge/src/compiler/x64/code-generator-x64.cc
/branches/bleeding_edge/src/compiler/x64/instruction-selector-x64.cc
/branches/bleeding_edge/src/ia32/assembler-ia32.cc
/branches/bleeding_edge/src/ia32/assembler-ia32.h
/branches/bleeding_edge/src/x64/assembler-x64.cc
/branches/bleeding_edge/src/x64/assembler-x64.h
/branches/bleeding_edge/test/cctest/compiler/test-run-machops.cc
/branches/bleeding_edge/test/cctest/test-disasm-ia32.cc
/branches/bleeding_edge/test/cctest/test-disasm-x64.cc
=======================================
--- /branches/bleeding_edge/src/compiler/ia32/code-generator-ia32.cc Thu
Oct 9 12:50:13 2014 UTC
+++ /branches/bleeding_edge/src/compiler/ia32/code-generator-ia32.cc Mon
Oct 13 07:12:57 2014 UTC
@@ -354,7 +354,7 @@
__ cvtss2sd(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
break;
case kSSECvtsd2ss:
- __ cvtsd2ss(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
+ __ cvtsd2ss(i.OutputDoubleRegister(), i.InputOperand(0));
break;
case kSSEFloat64ToInt32:
__ cvttsd2si(i.OutputRegister(), i.InputOperand(0));
=======================================
--- /branches/bleeding_edge/src/compiler/ia32/instruction-selector-ia32.cc
Thu Oct 2 09:04:04 2014 UTC
+++ /branches/bleeding_edge/src/compiler/ia32/instruction-selector-ia32.cc
Mon Oct 13 07:12:57 2014 UTC
@@ -530,8 +530,7 @@
void InstructionSelector::VisitTruncateFloat64ToFloat32(Node* node) {
IA32OperandGenerator g(this);
- // TODO(turbofan): IA32 SSE conversions should take an operand.
- Emit(kSSECvtsd2ss, g.DefineAsRegister(node),
g.UseRegister(node->InputAt(0)));
+ Emit(kSSECvtsd2ss, g.DefineAsRegister(node), g.Use(node->InputAt(0)));
}
=======================================
--- /branches/bleeding_edge/src/compiler/x64/code-generator-x64.cc Mon Oct
6 10:46:15 2014 UTC
+++ /branches/bleeding_edge/src/compiler/x64/code-generator-x64.cc Mon Oct
13 07:12:57 2014 UTC
@@ -408,7 +408,11 @@
__ cvtss2sd(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
break;
case kSSECvtsd2ss:
- __ cvtsd2ss(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
+ if (instr->InputAt(0)->IsDoubleRegister()) {
+ __ cvtsd2ss(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
+ } else {
+ __ cvtsd2ss(i.OutputDoubleRegister(), i.InputOperand(0));
+ }
break;
case kSSEFloat64ToInt32:
if (instr->InputAt(0)->IsDoubleRegister()) {
=======================================
--- /branches/bleeding_edge/src/compiler/x64/instruction-selector-x64.cc
Mon Oct 6 10:46:15 2014 UTC
+++ /branches/bleeding_edge/src/compiler/x64/instruction-selector-x64.cc
Mon Oct 13 07:12:57 2014 UTC
@@ -651,8 +651,7 @@
void InstructionSelector::VisitTruncateFloat64ToFloat32(Node* node) {
X64OperandGenerator g(this);
- // TODO(turbofan): X64 SSE conversions should take an operand.
- Emit(kSSECvtsd2ss, g.DefineAsRegister(node),
g.UseRegister(node->InputAt(0)));
+ Emit(kSSECvtsd2ss, g.DefineAsRegister(node), g.Use(node->InputAt(0)));
}
=======================================
--- /branches/bleeding_edge/src/ia32/assembler-ia32.cc Thu Oct 9 09:32:59
2014 UTC
+++ /branches/bleeding_edge/src/ia32/assembler-ia32.cc Mon Oct 13 07:12:57
2014 UTC
@@ -1960,7 +1960,7 @@
}
-void Assembler::cvtsd2ss(XMMRegister dst, XMMRegister src) {
+void Assembler::cvtsd2ss(XMMRegister dst, const Operand& src) {
EnsureSpace ensure_space(this);
EMIT(0xF2);
EMIT(0x0F);
=======================================
--- /branches/bleeding_edge/src/ia32/assembler-ia32.h Thu Oct 9 09:32:59
2014 UTC
+++ /branches/bleeding_edge/src/ia32/assembler-ia32.h Mon Oct 13 07:12:57
2014 UTC
@@ -959,7 +959,10 @@
void cvtsi2sd(XMMRegister dst, Register src) { cvtsi2sd(dst,
Operand(src)); }
void cvtsi2sd(XMMRegister dst, const Operand& src);
void cvtss2sd(XMMRegister dst, XMMRegister src);
- void cvtsd2ss(XMMRegister dst, XMMRegister src);
+ void cvtsd2ss(XMMRegister dst, const Operand& src);
+ void cvtsd2ss(XMMRegister dst, XMMRegister src) {
+ cvtsd2ss(dst, Operand(src));
+ }
void addsd(XMMRegister dst, XMMRegister src);
void addsd(XMMRegister dst, const Operand& src);
=======================================
--- /branches/bleeding_edge/src/x64/assembler-x64.cc Thu Oct 2 12:22:36
2014 UTC
+++ /branches/bleeding_edge/src/x64/assembler-x64.cc Mon Oct 13 07:12:57
2014 UTC
@@ -2759,6 +2759,16 @@
emit(0x5A);
emit_sse_operand(dst, src);
}
+
+
+void Assembler::cvtsd2ss(XMMRegister dst, const Operand& src) {
+ EnsureSpace ensure_space(this);
+ emit(0xF2);
+ emit_optional_rex_32(dst, src);
+ emit(0x0F);
+ emit(0x5A);
+ emit_sse_operand(dst, src);
+}
void Assembler::cvtsd2si(Register dst, XMMRegister src) {
=======================================
--- /branches/bleeding_edge/src/x64/assembler-x64.h Thu Oct 2 09:08:09
2014 UTC
+++ /branches/bleeding_edge/src/x64/assembler-x64.h Mon Oct 13 07:12:57
2014 UTC
@@ -1076,6 +1076,7 @@
void cvtss2sd(XMMRegister dst, XMMRegister src);
void cvtss2sd(XMMRegister dst, const Operand& src);
void cvtsd2ss(XMMRegister dst, XMMRegister src);
+ void cvtsd2ss(XMMRegister dst, const Operand& src);
void cvtsd2si(Register dst, XMMRegister src);
void cvtsd2siq(Register dst, XMMRegister src);
=======================================
--- /branches/bleeding_edge/test/cctest/compiler/test-run-machops.cc Wed
Oct 1 10:47:14 2014 UTC
+++ /branches/bleeding_edge/test/cctest/compiler/test-run-machops.cc Mon
Oct 13 07:12:57 2014 UTC
@@ -3318,6 +3318,38 @@
}
}
}
+
+
+TEST(RunTruncateFloat64ToFloat32_spilled) {
+ RawMachineAssemblerTester<uint32_t> m;
+ const int kNumInputs = 32;
+ int32_t magic = 0x786234;
+ double input[kNumInputs];
+ float result[kNumInputs];
+ Node* input_node[kNumInputs];
+
+ for (int i = 0; i < kNumInputs; i++) {
+ input_node[i] =
+ m.Load(kMachFloat64, m.PointerConstant(&input), m.Int32Constant(i
* 8));
+ }
+
+ for (int i = 0; i < kNumInputs; i++) {
+ m.Store(kMachFloat32, m.PointerConstant(&result), m.Int32Constant(i *
4),
+ m.TruncateFloat64ToFloat32(input_node[i]));
+ }
+
+ m.Return(m.Int32Constant(magic));
+
+ for (int i = 0; i < kNumInputs; i++) {
+ input[i] = 0.1 + i;
+ }
+
+ CHECK_EQ(magic, m.Call());
+
+ for (int i = 0; i < kNumInputs; i++) {
+ CHECK_EQ(result[i], DoubleToFloat32(input[i]));
+ }
+}
TEST(RunDeadChangeFloat64ToInt32) {
=======================================
--- /branches/bleeding_edge/test/cctest/test-disasm-ia32.cc Thu Oct 2
09:04:04 2014 UTC
+++ /branches/bleeding_edge/test/cctest/test-disasm-ia32.cc Mon Oct 13
07:12:57 2014 UTC
@@ -389,6 +389,8 @@
// Move operation
__ movaps(xmm0, xmm1);
__ shufps(xmm0, xmm0, 0x0);
+ __ cvtsd2ss(xmm0, xmm1);
+ __ cvtsd2ss(xmm0, Operand(ebx, ecx, times_4, 10000));
// logic operation
__ andps(xmm0, xmm1);
=======================================
--- /branches/bleeding_edge/test/cctest/test-disasm-x64.cc Thu Oct 2
12:22:36 2014 UTC
+++ /branches/bleeding_edge/test/cctest/test-disasm-x64.cc Mon Oct 13
07:12:57 2014 UTC
@@ -380,6 +380,8 @@
// Move operation
__ cvttss2si(rdx, Operand(rbx, rcx, times_4, 10000));
__ cvttss2si(rdx, xmm1);
+ __ cvtsd2ss(xmm0, xmm1);
+ __ cvtsd2ss(xmm0, Operand(rbx, rcx, times_4, 10000));
__ movaps(xmm0, xmm1);
// logic operation
--
--
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