Revision: 24789
Author: [email protected]
Date: Wed Oct 22 06:42:17 2014 UTC
Log: Use getauxval() if available.
This fixes the problem of not being able to detect ARM features on
ChromeOS because sandbox cannot access /proc/self/auxv and
/proc/cpuinfo there.
Drive-by-cleanup to libc detection in two other places.
[email protected]
Review URL: https://codereview.chromium.org/672543002
https://code.google.com/p/v8/source/detail?r=24789
Modified:
/branches/bleeding_edge/include/v8config.h
/branches/bleeding_edge/src/base/cpu.cc
/branches/bleeding_edge/src/sampler.cc
=======================================
--- /branches/bleeding_edge/include/v8config.h Mon Oct 20 12:04:22 2014 UTC
+++ /branches/bleeding_edge/include/v8config.h Wed Oct 22 06:42:17 2014 UTC
@@ -120,7 +120,6 @@
// V8_LIBC_BIONIC - Bionic libc
// V8_LIBC_BSD - BSD libc derivate
// V8_LIBC_GLIBC - GNU C library
-// V8_LIBC_UCLIBC - uClibc
//
// Note that testing for libc must be done using #if not #ifdef. For
example,
// to test for the GNU C library, use:
@@ -133,8 +132,6 @@
#elif defined(__BIONIC__)
# define V8_LIBC_BIONIC 1
# define V8_LIBC_BSD 1
-#elif defined(__UCLIBC__)
-# define V8_LIBC_UCLIBC 1
#elif defined(__GLIBC__) || defined(__GNU_LIBRARY__)
# define V8_LIBC_GLIBC 1
#else
=======================================
--- /branches/bleeding_edge/src/base/cpu.cc Thu Oct 9 09:39:23 2014 UTC
+++ /branches/bleeding_edge/src/base/cpu.cc Wed Oct 22 06:42:17 2014 UTC
@@ -7,12 +7,18 @@
#if V8_LIBC_MSVCRT
#include <intrin.h> // __cpuid()
#endif
-#if V8_OS_POSIX
-#include <unistd.h> // sysconf()
+#if V8_OS_LINUX
+#include <linux/auxvec.h> // AT_HWCAP
+#endif
+#if V8_GLIBC_PREREQ(2, 16)
+#include <sys/auxv.h> // getauxval()
#endif
#if V8_OS_QNX
#include <sys/syspage.h> // cpuinfo
#endif
+#if V8_OS_POSIX
+#include <unistd.h> // sysconf()
+#endif
#include <ctype.h>
#include <limits.h>
@@ -92,11 +98,12 @@
#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
#define HWCAP_LPAE (1 << 20)
-#define AT_HWCAP 16
-
-// Read the ELF HWCAP flags by parsing /proc/self/auxv.
static uint32_t ReadELFHWCaps() {
uint32_t result = 0;
+#if V8_GLIBC_PREREQ(2, 16)
+ result = static_cast<uint32_t>(getauxval(AT_HWCAP));
+#else
+ // Read the ELF HWCAP flags by parsing /proc/self/auxv.
FILE* fp = fopen("/proc/self/auxv", "r");
if (fp != NULL) {
struct { uint32_t tag; uint32_t value; } entry;
@@ -112,6 +119,7 @@
}
fclose(fp);
}
+#endif
return result;
}
@@ -310,7 +318,7 @@
has_vfp3_d32_(false),
is_fp64_mode_(false) {
memcpy(vendor_, "Unknown", 8);
-#if defined(__pnacl__)
+#if V8_OS_NACL
// Portable host shouldn't do feature detection.
// TODO(jfb): Remove the hardcoded ARM simulator flags in the build, and
// hardcode them here instead.
=======================================
--- /branches/bleeding_edge/src/sampler.cc Fri Oct 17 15:44:02 2014 UTC
+++ /branches/bleeding_edge/src/sampler.cc Wed Oct 22 06:42:17 2014 UTC
@@ -374,8 +374,7 @@
state.sp = reinterpret_cast<Address>(mcontext.gregs[REG_RSP]);
state.fp = reinterpret_cast<Address>(mcontext.gregs[REG_RBP]);
#elif V8_HOST_ARCH_ARM
-#if defined(__GLIBC__) && !defined(__UCLIBC__) && \
- (__GLIBC__ < 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ <= 3))
+#if V8_LIBC_GLIBC && !V8_GLIBC_PREREQ(2, 4)
// Old GLibc ARM versions used a gregs[] array to access the register
// values from mcontext_t.
state.pc = reinterpret_cast<Address>(mcontext.gregs[R15]);
@@ -385,8 +384,7 @@
state.pc = reinterpret_cast<Address>(mcontext.arm_pc);
state.sp = reinterpret_cast<Address>(mcontext.arm_sp);
state.fp = reinterpret_cast<Address>(mcontext.arm_fp);
-#endif // defined(__GLIBC__) && !defined(__UCLIBC__) &&
- // (__GLIBC__ < 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ <= 3))
+#endif // V8_LIBC_GLIBC && !V8_GLIBC_PREREQ(2, 4)
#elif V8_HOST_ARCH_ARM64
state.pc = reinterpret_cast<Address>(mcontext.pc);
state.sp = reinterpret_cast<Address>(mcontext.sp);
--
--
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