Revision: 24800
Author: [email protected]
Date: Wed Oct 22 11:06:22 2014 UTC
Log: Add FRINTP (round towards positive infinity) instruction.
Macro Assember, assembler and simulator for ARM64 were missing FRINTP.
[email protected], [email protected]
Review URL: https://codereview.chromium.org/669923002
https://code.google.com/p/v8/source/detail?r=24800
Modified:
/branches/bleeding_edge/src/arm64/assembler-arm64.cc
/branches/bleeding_edge/src/arm64/assembler-arm64.h
/branches/bleeding_edge/src/arm64/macro-assembler-arm64-inl.h
/branches/bleeding_edge/src/arm64/macro-assembler-arm64.h
/branches/bleeding_edge/src/arm64/simulator-arm64.cc
/branches/bleeding_edge/test/cctest/test-assembler-arm64.cc
/branches/bleeding_edge/test/cctest/test-disasm-arm64.cc
=======================================
--- /branches/bleeding_edge/src/arm64/assembler-arm64.cc Thu Sep 11
08:50:48 2014 UTC
+++ /branches/bleeding_edge/src/arm64/assembler-arm64.cc Wed Oct 22
11:06:22 2014 UTC
@@ -1934,6 +1934,12 @@
DCHECK(fd.SizeInBits() == fn.SizeInBits());
FPDataProcessing1Source(fd, fn, FRINTN);
}
+
+
+void Assembler::frintp(const FPRegister& fd, const FPRegister& fn) {
+ DCHECK(fd.SizeInBits() == fn.SizeInBits());
+ FPDataProcessing1Source(fd, fn, FRINTP);
+}
void Assembler::frintz(const FPRegister& fd,
=======================================
--- /branches/bleeding_edge/src/arm64/assembler-arm64.h Wed Sep 24 11:08:35
2014 UTC
+++ /branches/bleeding_edge/src/arm64/assembler-arm64.h Wed Oct 22 11:06:22
2014 UTC
@@ -1663,6 +1663,9 @@
// FP round to integer (nearest with ties to even).
void frintn(const FPRegister& fd, const FPRegister& fn);
+ // FP round to integer (towards plus infinity).
+ void frintp(const FPRegister& fd, const FPRegister& fn);
+
// FP round to integer (towards zero.)
void frintz(const FPRegister& fd, const FPRegister& fn);
=======================================
--- /branches/bleeding_edge/src/arm64/macro-assembler-arm64-inl.h Tue Sep
2 13:36:35 2014 UTC
+++ /branches/bleeding_edge/src/arm64/macro-assembler-arm64-inl.h Wed Oct
22 11:06:22 2014 UTC
@@ -823,6 +823,12 @@
DCHECK(allow_macro_instructions_);
frintn(fd, fn);
}
+
+
+void MacroAssembler::Frintp(const FPRegister& fd, const FPRegister& fn) {
+ DCHECK(allow_macro_instructions_);
+ frintp(fd, fn);
+}
void MacroAssembler::Frintz(const FPRegister& fd, const FPRegister& fn) {
=======================================
--- /branches/bleeding_edge/src/arm64/macro-assembler-arm64.h Mon Oct 13
14:41:33 2014 UTC
+++ /branches/bleeding_edge/src/arm64/macro-assembler-arm64.h Wed Oct 22
11:06:22 2014 UTC
@@ -422,6 +422,7 @@
inline void Frinta(const FPRegister& fd, const FPRegister& fn);
inline void Frintm(const FPRegister& fd, const FPRegister& fn);
inline void Frintn(const FPRegister& fd, const FPRegister& fn);
+ inline void Frintp(const FPRegister& fd, const FPRegister& fn);
inline void Frintz(const FPRegister& fd, const FPRegister& fn);
inline void Fsqrt(const FPRegister& fd, const FPRegister& fn);
inline void Fsub(const FPRegister& fd,
=======================================
--- /branches/bleeding_edge/src/arm64/simulator-arm64.cc Mon Sep 22
13:48:12 2014 UTC
+++ /branches/bleeding_edge/src/arm64/simulator-arm64.cc Wed Oct 22
11:06:22 2014 UTC
@@ -2463,6 +2463,12 @@
set_sreg(fd, FPRoundInt(sreg(fn), FPNegativeInfinity)); break;
case FRINTM_d:
set_dreg(fd, FPRoundInt(dreg(fn), FPNegativeInfinity)); break;
+ case FRINTP_s:
+ set_sreg(fd, FPRoundInt(sreg(fn), FPPositiveInfinity));
+ break;
+ case FRINTP_d:
+ set_dreg(fd, FPRoundInt(dreg(fn), FPPositiveInfinity));
+ break;
case FRINTN_s: set_sreg(fd, FPRoundInt(sreg(fn), FPTieEven)); break;
case FRINTN_d: set_dreg(fd, FPRoundInt(dreg(fn), FPTieEven)); break;
case FRINTZ_s: set_sreg(fd, FPRoundInt(sreg(fn), FPZero)); break;
@@ -2767,6 +2773,10 @@
// We always use floor(value).
break;
}
+ case FPPositiveInfinity: {
+ int_result = ceil(value);
+ break;
+ }
default: UNIMPLEMENTED();
}
return int_result;
=======================================
--- /branches/bleeding_edge/test/cctest/test-assembler-arm64.cc Tue Sep 16
10:42:09 2014 UTC
+++ /branches/bleeding_edge/test/cctest/test-assembler-arm64.cc Wed Oct 22
11:06:22 2014 UTC
@@ -6552,6 +6552,95 @@
TEARDOWN();
}
+
+
+TEST(frintp) {
+ INIT_V8();
+ SETUP();
+
+ START();
+ __ Fmov(s16, 1.0);
+ __ Fmov(s17, 1.1);
+ __ Fmov(s18, 1.5);
+ __ Fmov(s19, 1.9);
+ __ Fmov(s20, 2.5);
+ __ Fmov(s21, -1.5);
+ __ Fmov(s22, -2.5);
+ __ Fmov(s23, kFP32PositiveInfinity);
+ __ Fmov(s24, kFP32NegativeInfinity);
+ __ Fmov(s25, 0.0);
+ __ Fmov(s26, -0.0);
+ __ Fmov(s27, -0.2);
+
+ __ Frintp(s0, s16);
+ __ Frintp(s1, s17);
+ __ Frintp(s2, s18);
+ __ Frintp(s3, s19);
+ __ Frintp(s4, s20);
+ __ Frintp(s5, s21);
+ __ Frintp(s6, s22);
+ __ Frintp(s7, s23);
+ __ Frintp(s8, s24);
+ __ Frintp(s9, s25);
+ __ Frintp(s10, s26);
+ __ Frintp(s11, s27);
+
+ __ Fmov(d16, -0.5);
+ __ Fmov(d17, -0.8);
+ __ Fmov(d18, 1.5);
+ __ Fmov(d19, 1.9);
+ __ Fmov(d20, 2.5);
+ __ Fmov(d21, -1.5);
+ __ Fmov(d22, -2.5);
+ __ Fmov(d23, kFP32PositiveInfinity);
+ __ Fmov(d24, kFP32NegativeInfinity);
+ __ Fmov(d25, 0.0);
+ __ Fmov(d26, -0.0);
+ __ Fmov(d27, -0.2);
+
+ __ Frintp(d12, d16);
+ __ Frintp(d13, d17);
+ __ Frintp(d14, d18);
+ __ Frintp(d15, d19);
+ __ Frintp(d16, d20);
+ __ Frintp(d17, d21);
+ __ Frintp(d18, d22);
+ __ Frintp(d19, d23);
+ __ Frintp(d20, d24);
+ __ Frintp(d21, d25);
+ __ Frintp(d22, d26);
+ __ Frintp(d23, d27);
+ END();
+
+ RUN();
+
+ CHECK_EQUAL_FP32(1.0, s0);
+ CHECK_EQUAL_FP32(2.0, s1);
+ CHECK_EQUAL_FP32(2.0, s2);
+ CHECK_EQUAL_FP32(2.0, s3);
+ CHECK_EQUAL_FP32(3.0, s4);
+ CHECK_EQUAL_FP32(-1.0, s5);
+ CHECK_EQUAL_FP32(-2.0, s6);
+ CHECK_EQUAL_FP32(kFP32PositiveInfinity, s7);
+ CHECK_EQUAL_FP32(kFP32NegativeInfinity, s8);
+ CHECK_EQUAL_FP32(0.0, s9);
+ CHECK_EQUAL_FP32(-0.0, s10);
+ CHECK_EQUAL_FP32(-0.0, s11);
+ CHECK_EQUAL_FP64(-0.0, d12);
+ CHECK_EQUAL_FP64(-0.0, d13);
+ CHECK_EQUAL_FP64(2.0, d14);
+ CHECK_EQUAL_FP64(2.0, d15);
+ CHECK_EQUAL_FP64(3.0, d16);
+ CHECK_EQUAL_FP64(-1.0, d17);
+ CHECK_EQUAL_FP64(-2.0, d18);
+ CHECK_EQUAL_FP64(kFP64PositiveInfinity, d19);
+ CHECK_EQUAL_FP64(kFP64NegativeInfinity, d20);
+ CHECK_EQUAL_FP64(0.0, d21);
+ CHECK_EQUAL_FP64(-0.0, d22);
+ CHECK_EQUAL_FP64(-0.0, d23);
+
+ TEARDOWN();
+}
TEST(frintz) {
=======================================
--- /branches/bleeding_edge/test/cctest/test-disasm-arm64.cc Mon Aug 4
11:34:54 2014 UTC
+++ /branches/bleeding_edge/test/cctest/test-disasm-arm64.cc Wed Oct 22
11:06:22 2014 UTC
@@ -1408,6 +1408,10 @@
COMPARE(frintn(s31, s30), "frintn s31, s30");
COMPARE(frintn(d12, d13), "frintn d12, d13");
COMPARE(frintn(d31, d30), "frintn d31, d30");
+ COMPARE(frintp(s10, s11), "frintp s10, s11");
+ COMPARE(frintp(s31, s30), "frintp s31, s30");
+ COMPARE(frintp(d12, d13), "frintp d12, d13");
+ COMPARE(frintp(d31, d30), "frintp d31, d30");
COMPARE(frintz(s10, s11), "frintz s10, s11");
COMPARE(frintz(s31, s30), "frintz s31, s30");
COMPARE(frintz(d12, d13), "frintz d12, d13");
--
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