Reviewers: danno, titzer, paul.l..., gergely.kis.imgtec, kilvadyb,
dusmil.imgtec,
Message:
PTAL.
Description:
MIPS: [turbofan] Clean up and factor out branch generation logic.
Port aed26c05a50b2a1257ef8accc67143825f2e1f60
BUG=
Please review this at https://codereview.chromium.org/742243003/
Base URL: https://chromium.googlesource.com/v8/v8.git@master
Affected files (+3, -9 lines):
M src/compiler/mips/code-generator-mips.cc
M src/compiler/mips64/code-generator-mips64.cc
Index: src/compiler/mips/code-generator-mips.cc
diff --git a/src/compiler/mips/code-generator-mips.cc
b/src/compiler/mips/code-generator-mips.cc
index
a49be3939667f32ad6a9590baabc189f1b317501..4eb372a7800be2be7a6448bfeba6c2aa71acf226
100644
--- a/src/compiler/mips/code-generator-mips.cc
+++ b/src/compiler/mips/code-generator-mips.cc
@@ -391,8 +391,7 @@ void
CodeGenerator::AssembleArchInstruction(Instruction* instr) {
UNIMPLEMENTED();
// Assembles branches after an instruction.
-void CodeGenerator::AssembleArchBranch(Instruction* instr,
- FlagsCondition condition) {
+void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo*
branch) {
MipsOperandConverter i(this, instr);
Label* tlabel = branch->true_label;
Label* flabel = branch->false_label;
@@ -416,7 +415,7 @@ void CodeGenerator::AssembleArchBranch(Instruction*
instr,
cc = eq;
break;
default:
- UNSUPPORTED_COND(kMipsTst, condition);
+ UNSUPPORTED_COND(kMipsTst, branch->condition);
break;
}
__ And(at, i.InputRegister(0), i.InputOperand(1));
Index: src/compiler/mips64/code-generator-mips64.cc
diff --git a/src/compiler/mips64/code-generator-mips64.cc
b/src/compiler/mips64/code-generator-mips64.cc
index
c623045305813ecf8adb7ce3a88e3e0f22c5f53d..332afb8af3be6f7d8b91132d5600f692138a49dd
100644
--- a/src/compiler/mips64/code-generator-mips64.cc
+++ b/src/compiler/mips64/code-generator-mips64.cc
@@ -477,8 +477,7 @@ void
CodeGenerator::AssembleArchInstruction(Instruction* instr) {
UNIMPLEMENTED();
// Assembles branches after an instruction.
-void CodeGenerator::AssembleArchBranch(Instruction* instr,
- FlagsCondition condition) {
+void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo*
branch) {
MipsOperandConverter i(this, instr);
Label* tlabel = branch->true_label;
Label* flabel = branch->false_label;
@@ -583,7 +582,6 @@ void CodeGenerator::AssembleArchBranch(Instruction*
instr,
__ Branch(tlabel, cc, i.InputRegister(0), i.InputOperand(1));
if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
- __ bind(&done);
} else if (instr->arch_opcode() == kMips64Cmp32) {
switch (branch->condition) {
@@ -654,7 +652,6 @@ void CodeGenerator::AssembleArchBranch(Instruction*
instr,
__ Branch(tlabel, cc, i.InputRegister(0), i.InputOperand(1));
if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
- __ bind(&done);
} else if (instr->arch_opcode() == kMips64CmpD) {
// TODO(dusmil) optimize unordered checks to use less instructions
// even if we have to unfold BranchF macro.
@@ -689,8 +686,6 @@ void CodeGenerator::AssembleArchBranch(Instruction*
instr,
i.InputDoubleRegister(1));
if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
- __ bind(&done);
-
} else {
PrintF("AssembleArchBranch Unimplemented arch_opcode: %d\n",
instr->arch_opcode());
--
--
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