DBC
https://codereview.chromium.org/763963002/diff/100001/src/compiler/arm64/code-generator-arm64.cc
File src/compiler/arm64/code-generator-arm64.cc (right):
https://codereview.chromium.org/763963002/diff/100001/src/compiler/arm64/code-generator-arm64.cc#newcode185
src/compiler/arm64/code-generator-arm64.cc:185: __ Fmov(result_,
std::numeric_limits<float>::quiet_NaN());
This won't do what you expect. Since result is a double register the
float NaN will be promoted to double NaN.
If you use FPRegister (which can be 32 or 64) instead then you can
squash both 32 and 64 handler in one, just query the register size to
work out which NaN value to pass.
https://codereview.chromium.org/763963002/diff/100001/src/compiler/arm64/code-generator-arm64.cc#newcode230
src/compiler/arm64/code-generator-arm64.cc:230: __ bind(ool->exit());
\
nit, use the upper case variant: Bind. Same below.
https://codereview.chromium.org/763963002/
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