[v8-dev] MIPS: Improve pushing arguments on stack. (issue 769283002 by [email protected])

Tue, 02 Dec 2014 07:28:59 -0800 

Reviewers: paul.l..., akos.palfi.imgtec, balazs.kilvady,

Description:
MIPS: Improve pushing arguments on stack.

TEST=
BUG=

Please review this at https://codereview.chromium.org/769283002/

Base URL: https://chromium.googlesource.com/v8/v8.git@master

Affected files (+41, -13 lines):
  M src/compiler/mips/code-generator-mips.cc
  M src/compiler/mips/instruction-codes-mips.h
  M src/compiler/mips/instruction-selector-mips.cc
  M src/compiler/mips64/code-generator-mips64.cc
  M src/compiler/mips64/instruction-codes-mips64.h
  M src/compiler/mips64/instruction-selector-mips64.cc


Index: src/compiler/mips/code-generator-mips.cc
diff --git a/src/compiler/mips/code-generator-mips.cc b/src/compiler/mips/code-generator-mips.cc index 6fb0a30edd41a2261f73140a882eda1e376af8e2..89e8ce3a15c804abdabf72b1b3bc643d2970c5f2 100644 
--- a/src/compiler/mips/code-generator-mips.cc
+++ b/src/compiler/mips/code-generator-mips.cc
@@ -373,6 +373,16 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) { 
     case kMipsPush:
       __ Push(i.InputRegister(0));
       break;
+    case kMipsStackClaim: {
+      int words = MiscField::decode(instr->opcode());
+      __ Subu(sp, sp, Operand(words << kPointerSizeLog2));
+      break;
+    }
+    case kMipsStoreToStackSlot: {
+      int slot = MiscField::decode(instr->opcode());
+      __ sw(i.InputRegister(0), MemOperand(sp, slot << kPointerSizeLog2));
+      break;
+    }
     case kMipsStoreWriteBarrier:
       Register object = i.InputRegister(0);
       Register index = i.InputRegister(1);
Index: src/compiler/mips/instruction-codes-mips.h
diff --git a/src/compiler/mips/instruction-codes-mips.h b/src/compiler/mips/instruction-codes-mips.h index 1e8be7ff67887207be547270fa1af5905d2b209d..1c684cb8d4c418097bb980d5c83ee02ba2732d8b 100644 
--- a/src/compiler/mips/instruction-codes-mips.h
+++ b/src/compiler/mips/instruction-codes-mips.h
@@ -59,6 +59,8 @@ namespace compiler {
   V(MipsLdc1)                      \
   V(MipsSdc1)                      \
   V(MipsPush)                      \
+  V(MipsStoreToStackSlot)          \
+  V(MipsStackClaim)                \
   V(MipsStoreWriteBarrier)


Index: src/compiler/mips/instruction-selector-mips.cc
diff --git a/src/compiler/mips/instruction-selector-mips.cc b/src/compiler/mips/instruction-selector-mips.cc index 4ee81a7486804efe72692542a32776562f997aaf..4c94420884ab3f0e2f4454d4fca213d7d465895f 100644 
--- a/src/compiler/mips/instruction-selector-mips.cc
+++ b/src/compiler/mips/instruction-selector-mips.cc
@@ -446,15 +446,17 @@ void InstructionSelector::VisitCall(Node* node) {

   // Compute InstructionOperands for inputs and outputs.
   InitializeCallBuffer(node, &buffer, true, false);
-
-  // TODO(dcarney): might be possible to use claim/poke instead
-  // Push any stack arguments.
+  // Possibly align stack here for functions.
+  int push_count = buffer.pushed_nodes.size();
+  if (push_count > 0) {
+    Emit(kMipsStackClaim | MiscField::encode(push_count), NULL);
+  }
+  int slot = buffer.pushed_nodes.size() - 1;
   for (NodeVectorRIter input = buffer.pushed_nodes.rbegin();
        input != buffer.pushed_nodes.rend(); input++) {
-    // TODO(plind): inefficient for MIPS, use MultiPush here.
-    //    - Also need to align the stack. See arm64.
-    //    - Maybe combine with arg slot stuff in DirectCEntry stub.
-    Emit(kMipsPush, NULL, g.UseRegister(*input));
+    Emit(kMipsStoreToStackSlot | MiscField::encode(slot), NULL,
+         g.UseRegister(*input));
+    slot--;
   }

   // Select the appropriate opcode based on the call type.
Index: src/compiler/mips64/code-generator-mips64.cc
diff --git a/src/compiler/mips64/code-generator-mips64.cc b/src/compiler/mips64/code-generator-mips64.cc index 2b59bc70367006ac803f572a041f7470fa22d36a..9d47f299640c0da0e49632844688ed78bc0b35e0 100644 
--- a/src/compiler/mips64/code-generator-mips64.cc
+++ b/src/compiler/mips64/code-generator-mips64.cc
@@ -459,6 +459,16 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) { 
     case kMips64Push:
       __ Push(i.InputRegister(0));
       break;
+    case kMips64StackClaim: {
+      int words = MiscField::decode(instr->opcode());
+      __ Dsubu(sp, sp, Operand(words << kPointerSizeLog2));
+      break;
+    }
+    case kMips64StoreToStackSlot: {
+      int slot = MiscField::decode(instr->opcode());
+      __ sd(i.InputRegister(0), MemOperand(sp, slot << kPointerSizeLog2));
+      break;
+    }
     case kMips64StoreWriteBarrier:
       Register object = i.InputRegister(0);
       Register index = i.InputRegister(1);
Index: src/compiler/mips64/instruction-codes-mips64.h
diff --git a/src/compiler/mips64/instruction-codes-mips64.h b/src/compiler/mips64/instruction-codes-mips64.h index c22274cf07e1516fd1fcfb69f7af65a6fbae44e1..ff04c345f2a246f1cfc42f38d4829935aa973e9e 100644 
--- a/src/compiler/mips64/instruction-codes-mips64.h
+++ b/src/compiler/mips64/instruction-codes-mips64.h
@@ -77,6 +77,8 @@ namespace compiler {
   V(Mips64Ldc1)                    \
   V(Mips64Sdc1)                    \
   V(Mips64Push)                    \
+  V(Mips64StoreToStackSlot)        \
+  V(Mips64StackClaim)              \
   V(Mips64StoreWriteBarrier)


Index: src/compiler/mips64/instruction-selector-mips64.cc
diff --git a/src/compiler/mips64/instruction-selector-mips64.cc b/src/compiler/mips64/instruction-selector-mips64.cc index 80504ed72c3ea0471328eda3c5ed54fbaa1c2b69..24383f30de6481daaf8d37f572214553452f258b 100644 
--- a/src/compiler/mips64/instruction-selector-mips64.cc
+++ b/src/compiler/mips64/instruction-selector-mips64.cc
@@ -643,14 +643,16 @@ void InstructionSelector::VisitCall(Node* node) {
   // Compute InstructionOperands for inputs and outputs.
   InitializeCallBuffer(node, &buffer, true, false);

-  // TODO(dcarney): might be possible to use claim/poke instead
-  // Push any stack arguments.
+  int push_count = buffer.pushed_nodes.size();
+  if (push_count > 0) {
+    Emit(kMips64StackClaim | MiscField::encode(push_count), NULL);
+  }
+  int slot = buffer.pushed_nodes.size() - 1;
   for (NodeVectorRIter input = buffer.pushed_nodes.rbegin();
        input != buffer.pushed_nodes.rend(); input++) {
-    // TODO(plind): inefficient for MIPS, use MultiPush here.
-    //    - Also need to align the stack. See arm64.
-    //    - Maybe combine with arg slot stuff in DirectCEntry stub.
-    Emit(kMips64Push, NULL, g.UseRegister(*input));
+    Emit(kMips64StoreToStackSlot | MiscField::encode(slot), NULL,
+         g.UseRegister(*input));
+    slot--;
   }

   // Select the appropriate opcode based on the call type.


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