Reviewers: danno, titzer, Benedikt Meurer, dcarney,
Message:
PTAL
Description:
x86: enable check of Atom
BUG=
Please review this at https://codereview.chromium.org/809003002/
Base URL: https://chromium.googlesource.com/v8/v8.git@master
Affected files (+28, -5 lines):
M src/base/cpu.h
M src/base/cpu.cc
M src/flag-definitions.h
M src/globals.h
M src/ia32/assembler-ia32.cc
M src/x64/assembler-x64.cc
Index: src/base/cpu.cc
diff --git a/src/base/cpu.cc b/src/base/cpu.cc
index
e188406f1a21ff72226b17c2332eb7ccd942dd49..21ce9332a2362faf90132acd4cbe50d0b14fd4e5
100644
--- a/src/base/cpu.cc
+++ b/src/base/cpu.cc
@@ -311,6 +311,7 @@ CPU::CPU()
has_ssse3_(false),
has_sse41_(false),
has_sse42_(false),
+ is_atom_(false),
has_avx_(false),
has_fma3_(false),
has_idiva_(false),
@@ -361,6 +362,20 @@ CPU::CPU()
has_sse42_ = (cpu_info[2] & 0x00100000) != 0;
has_avx_ = (cpu_info[2] & 0x10000000) != 0;
if (has_avx_) has_fma3_ = (cpu_info[2] & 0x00001000) != 0;
+
+ if (family_ == 0x6) {
+ switch (model_) {
+ case 0x1c: // SLT
+ case 0x26:
+ case 0x36:
+ case 0x27:
+ case 0x35:
+ case 0x37: // SLM
+ case 0x4a:
+ case 0x4d:
+ is_atom_ = true;
+ }
+ }
}
#if V8_HOST_ARCH_IA32
Index: src/base/cpu.h
diff --git a/src/base/cpu.h b/src/base/cpu.h
index
fe8e1029757f0d37806247366b307eb3e3c13ad7..309860bee58c03e922e2b6f53d3104a9e0087576
100644
--- a/src/base/cpu.h
+++ b/src/base/cpu.h
@@ -70,6 +70,7 @@ class CPU FINAL {
bool has_sse42() const { return has_sse42_; }
bool has_avx() const { return has_avx_; }
bool has_fma3() const { return has_fma3_; }
+ bool is_atom() const { return is_atom_; }
// arm features
bool has_idiva() const { return has_idiva_; }
@@ -103,6 +104,7 @@ class CPU FINAL {
bool has_ssse3_;
bool has_sse41_;
bool has_sse42_;
+ bool is_atom_;
bool has_avx_;
bool has_fma3_;
bool has_idiva_;
Index: src/flag-definitions.h
diff --git a/src/flag-definitions.h b/src/flag-definitions.h
index
1bde01134c900e0ea525202c8e9375da357a9350..311374c0d78ab14477724919e16e923f54cd7619
100644
--- a/src/flag-definitions.h
+++ b/src/flag-definitions.h
@@ -437,6 +437,8 @@ DEFINE_BOOL(enable_sahf, true,
"enable use of SAHF instruction if available (X64 only)")
DEFINE_BOOL(enable_avx, true, "enable use of AVX instructions if
available")
DEFINE_BOOL(enable_fma3, true, "enable use of FMA3 instructions if
available")
+DEFINE_BOOL(enable_atom, true,
+ "enable specific optimization for Atom if available")
DEFINE_BOOL(enable_vfp3, ENABLE_VFP3_DEFAULT,
"enable use of VFP3 instructions if available")
DEFINE_BOOL(enable_armv7, ENABLE_ARMV7_DEFAULT,
Index: src/globals.h
diff --git a/src/globals.h b/src/globals.h
index
3a83f2cbee1d9a091d8c4cb6895ed0ab44c45485..efceb86e8e0111e11a435a715b42b339de2efa30
100644
--- a/src/globals.h
+++ b/src/globals.h
@@ -605,6 +605,7 @@ enum CpuFeature {
SAHF,
AVX,
FMA3,
+ ATOM,
// ARM
VFP3,
ARMv7,
Index: src/ia32/assembler-ia32.cc
diff --git a/src/ia32/assembler-ia32.cc b/src/ia32/assembler-ia32.cc
index
2805fa0f9a8a7f84dc0c137f798ded16510893be..1f7fd8ecaa1653deb7a2aecf2e0b4d962290d096
100644
--- a/src/ia32/assembler-ia32.cc
+++ b/src/ia32/assembler-ia32.cc
@@ -62,14 +62,16 @@ void CpuFeatures::ProbeImpl(bool cross_compile) {
if (cpu.has_sse3() && FLAG_enable_sse3) supported_ |= 1u << SSE3;
if (cpu.has_avx() && FLAG_enable_avx) supported_ |= 1u << AVX;
if (cpu.has_fma3() && FLAG_enable_fma3) supported_ |= 1u << FMA3;
+ if (cpu.is_atom() && FLAG_enable_atom) supported_ |= 1u << ATOM;
}
void CpuFeatures::PrintTarget() { }
void CpuFeatures::PrintFeatures() {
- printf("SSE3=%d SSE4_1=%d AVX=%d FMA3=%d\n",
CpuFeatures::IsSupported(SSE3),
- CpuFeatures::IsSupported(SSE4_1), CpuFeatures::IsSupported(AVX),
- CpuFeatures::IsSupported(FMA3));
+ printf("SSE3=%d SSE4_1=%d AVX=%d FMA3=%d ATOM=%d\n",
+ CpuFeatures::IsSupported(SSE3), CpuFeatures::IsSupported(SSE4_1),
+ CpuFeatures::IsSupported(AVX), CpuFeatures::IsSupported(FMA3),
+ CpuFeatures::IsSupported(ATOM));
}
Index: src/x64/assembler-x64.cc
diff --git a/src/x64/assembler-x64.cc b/src/x64/assembler-x64.cc
index
469ebe9888f41efb06cdc04f07d199d7cc901e0b..db84c9de3a70eba91ddcac016c0f98828ee22b41
100644
--- a/src/x64/assembler-x64.cc
+++ b/src/x64/assembler-x64.cc
@@ -30,15 +30,16 @@ void CpuFeatures::ProbeImpl(bool cross_compile) {
if (cpu.has_sahf() && FLAG_enable_sahf) supported_ |= 1u << SAHF;
if (cpu.has_avx() && FLAG_enable_avx) supported_ |= 1u << AVX;
if (cpu.has_fma3() && FLAG_enable_fma3) supported_ |= 1u << FMA3;
+ if (cpu.is_atom() && FLAG_enable_atom) supported_ |= 1u << ATOM;
}
void CpuFeatures::PrintTarget() { }
void CpuFeatures::PrintFeatures() {
- printf("SSE3=%d SSE4_1=%d SAHF=%d AVX=%d FMA3=%d\n",
+ printf("SSE3=%d SSE4_1=%d SAHF=%d AVX=%d FMA3=%d ATOM=%d\n",
CpuFeatures::IsSupported(SSE3), CpuFeatures::IsSupported(SSE4_1),
CpuFeatures::IsSupported(SAHF), CpuFeatures::IsSupported(AVX),
- CpuFeatures::IsSupported(FMA3));
+ CpuFeatures::IsSupported(FMA3), CpuFeatures::IsSupported(ATOM));
}
--
--
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