Reviewers: Benedikt Meurer,
Message:
See test bot runs here: https://codereview.chromium.org/863583003
Description:
Use fast_sqrt instead of std::sqrt in simulators.
This prevents clang from inlining and returning inconsistent results.
[email protected]
BUG=v8:3802
Please review this at https://codereview.chromium.org/831393006/
Base URL: https://chromium.googlesource.com/v8/v8.git@master
Affected files (+5, -5 lines):
M src/arm/simulator-arm.cc
M src/arm64/simulator-arm64.cc
M src/mips/simulator-mips.cc
M src/mips64/simulator-mips64.cc
M src/ppc/simulator-ppc.cc
Index: src/arm/simulator-arm.cc
diff --git a/src/arm/simulator-arm.cc b/src/arm/simulator-arm.cc
index
e34c3116e6d0d41debcc4c6c8a8bb3e5dd3fa6cd..50c42c350ddf095305d0957ba6edd7d95de84ccb
100644
--- a/src/arm/simulator-arm.cc
+++ b/src/arm/simulator-arm.cc
@@ -3069,7 +3069,7 @@ void Simulator::DecodeTypeVFP(Instruction* instr) {
} else if (((instr->Opc2Value() == 0x1)) && (instr->Opc3Value() ==
0x3)) {
// vsqrt
double dm_value = get_double_from_d_register(vm);
- double dd_value = std::sqrt(dm_value);
+ double dd_value = fast_sqrt(dm_value);
dd_value = canonicalizeNaN(dd_value);
set_d_register_from_double(vd, dd_value);
} else if (instr->Opc3Value() == 0x0) {
Index: src/arm64/simulator-arm64.cc
diff --git a/src/arm64/simulator-arm64.cc b/src/arm64/simulator-arm64.cc
index
bc524af72cb2db9d9e70adaf0edef6bba365faeb..52739413e4547b7a7971c5aed50e31d17eef274c
100644
--- a/src/arm64/simulator-arm64.cc
+++ b/src/arm64/simulator-arm64.cc
@@ -3100,7 +3100,7 @@ T Simulator::FPSqrt(T op) {
} else if (op < 0.0) {
return FPDefaultNaN<T>();
} else {
- return std::sqrt(op);
+ return fast_sqrt(op);
}
}
Index: src/mips/simulator-mips.cc
diff --git a/src/mips/simulator-mips.cc b/src/mips/simulator-mips.cc
index
fabca67062fab264b5c9dff0192c308c18e67b9f..31571ac67240f4d5ae258c3971ec80f04dfd7b68
100644
--- a/src/mips/simulator-mips.cc
+++ b/src/mips/simulator-mips.cc
@@ -2244,7 +2244,7 @@ void Simulator::DecodeTypeRegister(Instruction*
instr) {
set_fpu_register_double(fd_reg, -fs);
break;
case SQRT_D:
- set_fpu_register_double(fd_reg, sqrt(fs));
+ set_fpu_register_double(fd_reg, fast_sqrt(fs));
break;
case C_UN_D:
set_fcsr_bit(fcsr_cc, std::isnan(fs) || std::isnan(ft));
Index: src/mips64/simulator-mips64.cc
diff --git a/src/mips64/simulator-mips64.cc b/src/mips64/simulator-mips64.cc
index
9899d47a0e5ec940d99bf1514827f6f57f2187f9..2915aa3a10d3473314e1b61e2f67bebaaf2a415f
100644
--- a/src/mips64/simulator-mips64.cc
+++ b/src/mips64/simulator-mips64.cc
@@ -2391,7 +2391,7 @@ void Simulator::DecodeTypeRegister(Instruction*
instr) {
set_fpu_register_double(fd_reg, -fs);
break;
case SQRT_D:
- set_fpu_register_double(fd_reg, sqrt(fs));
+ set_fpu_register_double(fd_reg, fast_sqrt(fs));
break;
case C_UN_D:
set_fcsr_bit(fcsr_cc, std::isnan(fs) || std::isnan(ft));
Index: src/ppc/simulator-ppc.cc
diff --git a/src/ppc/simulator-ppc.cc b/src/ppc/simulator-ppc.cc
index
0d10153790b7c761b09a304ade49493598760441..34c35d613e6ff6dfa78acbc78612aeb6a785d01d
100644
--- a/src/ppc/simulator-ppc.cc
+++ b/src/ppc/simulator-ppc.cc
@@ -2613,7 +2613,7 @@ void Simulator::ExecuteExt4(Instruction* instr) {
int frt = instr->RTValue();
int frb = instr->RBValue();
double frb_val = get_double_from_d_register(frb);
- double frt_val = std::sqrt(frb_val);
+ double frt_val = fast_sqrt(frb_val);
set_d_register_from_double(frt, frt_val);
return;
}
--
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