Reviewers: danno, mvstanton, paul.l..., gergely.kis.imgtec,
akos.palfi.imgtec, dusmil.imgtec,
Description:
MIPS64: Megamorphic KeyedLoadIC needs special handling for vector ics.
Port 16843e239d95f5e8eaaa06d2a0a6e371298fe11f
Original commit message:
When --vector-ics is true, we still tail-call to the hand-written
megamorphic KeyedLoadIC (formerly "generic"). Now that this code uses
the megamorphic cache, it needs to deal properly with the vector and
slot registers. Achieve this with a sentinel vectors/slot combo.
BUG=
Please review this at https://codereview.chromium.org/894053002/
Base URL: https://chromium.googlesource.com/v8/v8.git@master
Affected files (+15, -1 lines):
M src/ic/mips64/ic-mips64.cc
Index: src/ic/mips64/ic-mips64.cc
diff --git a/src/ic/mips64/ic-mips64.cc b/src/ic/mips64/ic-mips64.cc
index
1c5efffda8185278662e09edd71d7132fc085534..aec4299511424e2fca0a27d23ff4b4ed3684cc66
100644
--- a/src/ic/mips64/ic-mips64.cc
+++ b/src/ic/mips64/ic-mips64.cc
@@ -534,10 +534,24 @@ void KeyedLoadIC::GenerateMegamorphic(MacroAssembler*
masm) {
__ LoadRoot(at, Heap::kHashTableMapRootIndex);
__ Branch(&probe_dictionary, eq, a4, Operand(at));
+ if (FLAG_vector_ics) {
+ // When vector ics are in use, the handlers in the stub cache expect a
+ // vector and slot. Since we won't change the IC from any downstream
+ // misses, a dummy vector can be used.
+ Register vector = VectorLoadICDescriptor::VectorRegister();
+ Register slot = VectorLoadICDescriptor::SlotRegister();
+ DCHECK(!AreAliased(vector, slot, a4, a5, a6, t1));
+ Handle<TypeFeedbackVector> dummy_vector =
Handle<TypeFeedbackVector>::cast(
+ masm->isolate()->factory()->keyed_load_dummy_vector());
+ int int_slot = dummy_vector->GetIndex(FeedbackVectorICSlot(0));
+ __ LoadRoot(vector, Heap::kKeyedLoadDummyVectorRootIndex);
+ __ li(slot, Operand(Smi::FromInt(int_slot)));
+ }
+
Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
Code::ComputeHandlerFlags(Code::LOAD_IC));
masm->isolate()->stub_cache()->GenerateProbe(
- masm, Code::LOAD_IC, flags, false, receiver, key, a3, a4, a5, a6);
+ masm, Code::LOAD_IC, flags, false, receiver, key, a4, a5, a6, t1);
// Cache miss.
GenerateMiss(masm);
--
--
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