Reviewers: Benedikt Meurer, danno, paul.l..., gergely.kis.imgtec,
balazs.kilvady, dusmil.imgtec,
Message:
PTAL.
Description:
MIPS: [turbofan] Initial support for Switch.
Port feb2890711e8072a9550abb89621929816fc9699
Original commit message:
Adds Switch and Case operators to TurboFan and handles them
appropriately in instruction selection and code generation.
BUG=
Please review this at https://codereview.chromium.org/896973005/
Base URL: https://chromium.googlesource.com/v8/v8.git@master
Affected files (+31, -0 lines):
M src/compiler/mips/code-generator-mips.cc
Index: src/compiler/mips/code-generator-mips.cc
diff --git a/src/compiler/mips/code-generator-mips.cc
b/src/compiler/mips/code-generator-mips.cc
index
a9cb8119708d9c2ca5a29b12d309644ca0ea8dfb..3353aabca395226a9a9a13245152be28400cf7f0
100644
--- a/src/compiler/mips/code-generator-mips.cc
+++ b/src/compiler/mips/code-generator-mips.cc
@@ -428,6 +428,9 @@ void
CodeGenerator::AssembleArchInstruction(Instruction* instr) {
case kArchJmp:
AssembleArchJump(i.InputRpo(0));
break;
+ case kArchSwitch:
+ AssembleArchSwitch(instr);
+ break;
case kArchNop:
// don't emit code for nops.
break;
@@ -802,6 +805,28 @@ void
CodeGenerator::AssembleArchJump(BasicBlock::RpoNumber target) {
}
+void CodeGenerator::AssembleArchSwitch(Instruction* instr) {
+ MipsOperandConverter i(this, instr);
+ int const kNumLabels = static_cast<int>(instr->InputCount() - 1);
+ v8::internal::Assembler::BlockTrampolinePoolScope block_trampoline_pool(
+ masm());
+ Label here;
+
+ __ bal(&here);
+ __ nop(); // Branch delay slot nop.
+ __ bind(&here);
+ __ sll(at, i.InputRegister(0), 2);
+ __ addu(at, at, ra);
+ __ lw(at, MemOperand(at, 5 * v8::internal::Assembler::kInstrSize));
+ __ jr(at);
+ __ nop(); // Branch delay slot nop.
+
+ for (int index = 0; index < kNumLabels; ++index) {
+ __ dd(GetLabel(i.InputRpo(index + 1)));
+ }
+}
+
+
// Assembles boolean materializations after an instruction.
void CodeGenerator::AssembleArchBoolean(Instruction* instr,
FlagsCondition condition) {
@@ -1126,6 +1151,12 @@ void CodeGenerator::AssembleSwap(InstructionOperand*
source,
}
+void CodeGenerator::AssembleJumpTable(Label** targets, size_t
target_count) {
+ // On 32-bit MIPS we emit the jump tables inline.
+ UNREACHABLE();
+}
+
+
void CodeGenerator::AddNopForSmiCodeInlining() {
// Unused on 32-bit ARM. Still exists on 64-bit arm.
// TODO(plind): Unclear when this is called now. Understand, fix if
needed.
--
--
v8-dev mailing list
[email protected]
http://groups.google.com/group/v8-dev
---
You received this message because you are subscribed to the Google Groups "v8-dev" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to [email protected].
For more options, visit https://groups.google.com/d/optout.
