Reviewers: paul.l..., dusmil.imgtec, akos.palfi.imgtec, gergely.kis.imgtec,
danno, Benedikt Meurer,
Message:
PTAL
In src/compiler/mips*/code-generator-mips*.cc I used a
case kMips64FmoveLowDUw:
__ mfhc1(at, i.OutputDoubleRegister());
__ FmoveLow(i.OutputDoubleRegister(), i.InputRegister(1));
__ mthc1(at, i.OutputDoubleRegister());
implementation to save the upper part of the FP register (needed by
cctes/test-run-machop/RunFloat64InsertLowWord32). That safety code could
also be
moved to macro-assembler or to
src/compiler/mips*/instruction-selector-mips*.cc.
On mips32 we need this code only if fp64 mode is used.
Description:
MIPS: [turbofan] Support for %_DoubleHi, %_DoubleLo and %_ConstructDouble.
Port 4436c2642a9b7adc9a1b68577ae9ca9a9a404c06
Original commit message:
This adds support for the double bits intrinsics to TurboFan, and is
a first step towards fast Math functions inlined into TurboFan code
or even compiled by themselves with TurboFan.
BUG=
Please review this at https://codereview.chromium.org/980073003/
Base URL: https://chromium.googlesource.com/v8/v8.git@master
Affected files (+124, -0 lines):
M src/compiler/mips/code-generator-mips.cc
M src/compiler/mips/instruction-codes-mips.h
M src/compiler/mips/instruction-selector-mips.cc
M src/compiler/mips64/code-generator-mips64.cc
M src/compiler/mips64/instruction-codes-mips64.h
M src/compiler/mips64/instruction-selector-mips64.cc
M src/mips/macro-assembler-mips.h
M src/mips64/macro-assembler-mips64.h
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