Reviewers: Benedikt Meurer, ulan,
Description:
[ARM64] [turbofan] Support Float64Min and Float64Max.
ARM64 support for Float64Min and Float64Max machine operators
(https://codereview.chromium.org/998283002/) using fmin and fmax.
BUG=
Please review this at https://codereview.chromium.org/1024093002/
Base URL: https://chromium.googlesource.com/v8/v8.git@master
Affected files (+27, -3 lines):
M src/compiler/arm64/code-generator-arm64.cc
M src/compiler/arm64/instruction-codes-arm64.h
M src/compiler/arm64/instruction-selector-arm64.cc
Index: src/compiler/arm64/code-generator-arm64.cc
diff --git a/src/compiler/arm64/code-generator-arm64.cc
b/src/compiler/arm64/code-generator-arm64.cc
index
3122225085ef44332675121d9234b6e1032ed1a9..eed1e13f7600d45366b7b3fdb435d9e3663840cb
100644
--- a/src/compiler/arm64/code-generator-arm64.cc
+++ b/src/compiler/arm64/code-generator-arm64.cc
@@ -740,6 +740,14 @@ void
CodeGenerator::AssembleArchInstruction(Instruction* instr) {
__ Fmov(i.OutputFloat64Register(), i.InputRegister(0));
break;
}
+ case kArm64Float64Max:
+ __ Fmax(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
+ i.InputDoubleRegister(1));
+ break;
+ case kArm64Float64Min:
+ __ Fmin(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
+ i.InputDoubleRegister(1));
+ break;
case kArm64Ldrb:
__ Ldrb(i.OutputRegister(), i.MemoryOperand());
break;
@@ -842,7 +850,7 @@ void
CodeGenerator::AssembleArchInstruction(Instruction* instr) {
ASSEMBLE_CHECKED_STORE_FLOAT(64);
break;
}
-}
+} // NOLINT(readability/fn_size)
// Assemble branches after this instruction.
Index: src/compiler/arm64/instruction-codes-arm64.h
diff --git a/src/compiler/arm64/instruction-codes-arm64.h
b/src/compiler/arm64/instruction-codes-arm64.h
index
3e3f5c37d927413189e64ff3fef5839d9a8f448a..ab19216e68661f69941a61c18d3c4eb2ce4c38bd
100644
--- a/src/compiler/arm64/instruction-codes-arm64.h
+++ b/src/compiler/arm64/instruction-codes-arm64.h
@@ -101,6 +101,8 @@ namespace compiler {
V(Arm64Float64InsertLowWord32) \
V(Arm64Float64InsertHighWord32) \
V(Arm64Float64MoveU64) \
+ V(Arm64Float64Max) \
+ V(Arm64Float64Min) \
V(Arm64LdrS) \
V(Arm64StrS) \
V(Arm64LdrD) \
Index: src/compiler/arm64/instruction-selector-arm64.cc
diff --git a/src/compiler/arm64/instruction-selector-arm64.cc
b/src/compiler/arm64/instruction-selector-arm64.cc
index
97099e2253702cc91aacf0335c6015b355eb99b8..c6c47d76d8505b61fc34287ccb36217f049c5727
100644
--- a/src/compiler/arm64/instruction-selector-arm64.cc
+++ b/src/compiler/arm64/instruction-selector-arm64.cc
@@ -1104,10 +1104,22 @@ void InstructionSelector::VisitFloat64Mod(Node*
node) {
}
-void InstructionSelector::VisitFloat64Max(Node* node) { UNREACHABLE(); }
+void InstructionSelector::VisitFloat64Max(Node* node) {
+ Arm64OperandGenerator g(this);
+ Node* left = node->InputAt(0);
+ Node* right = node->InputAt(1);
+ Emit(kArm64Float64Max, g.DefineAsRegister(node), g.UseRegister(left),
+ g.UseRegister(right));
+}
-void InstructionSelector::VisitFloat64Min(Node* node) { UNREACHABLE(); }
+void InstructionSelector::VisitFloat64Min(Node* node) {
+ Arm64OperandGenerator g(this);
+ Node* left = node->InputAt(0);
+ Node* right = node->InputAt(1);
+ Emit(kArm64Float64Min, g.DefineAsRegister(node), g.UseRegister(left),
+ g.UseRegister(right));
+}
void InstructionSelector::VisitFloat64Sqrt(Node* node) {
@@ -1681,6 +1693,8 @@ InstructionSelector::SupportedMachineOperatorFlags() {
return MachineOperatorBuilder::kFloat64RoundDown |
MachineOperatorBuilder::kFloat64RoundTruncate |
MachineOperatorBuilder::kFloat64RoundTiesAway |
+ MachineOperatorBuilder::kFloat64Max |
+ MachineOperatorBuilder::kFloat64Min |
MachineOperatorBuilder::kWord32ShiftIsSafe |
MachineOperatorBuilder::kInt32DivIsSafe |
MachineOperatorBuilder::kUint32DivIsSafe;
--
--
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