Reviewers: dcarney,
Description:
[turbofan] Address minor TODOs in instruction selector.
[email protected]
BUG=
Please review this at https://codereview.chromium.org/1029383002/
Base URL: https://chromium.googlesource.com/v8/v8.git@master
Affected files (+8, -6 lines):
M src/compiler/ia32/instruction-selector-ia32.cc
Index: src/compiler/ia32/instruction-selector-ia32.cc
diff --git a/src/compiler/ia32/instruction-selector-ia32.cc
b/src/compiler/ia32/instruction-selector-ia32.cc
index
ba21921dbb38c164f94df96c12074c93225fd7f2..913c59bd4582da97242b6f3c5ab14baa6c5ac9bc
100644
--- a/src/compiler/ia32/instruction-selector-ia32.cc
+++ b/src/compiler/ia32/instruction-selector-ia32.cc
@@ -17,10 +17,15 @@ class IA32OperandGenerator FINAL : public
OperandGenerator {
: OperandGenerator(selector) {}
InstructionOperand UseByteRegister(Node* node) {
- // TODO(dcarney): relax constraint.
+ // TODO(titzer): encode byte register use constraints.
return UseFixed(node, edx);
}
+ InstructionOperand DefineAsByteRegister(Node* node) {
+ // TODO(titzer): encode byte register def constraints.
+ return DefineAsRegister(node);
+ }
+
bool CanBeImmediate(Node* node) {
switch (node->opcode()) {
case IrOpcode::kInt32Constant:
@@ -132,7 +137,6 @@ void InstructionSelector::VisitLoad(Node* node) {
MachineType typ = TypeOf(OpParameter<LoadRepresentation>(node));
ArchOpcode opcode;
- // TODO(titzer): signed/unsigned small loads
switch (rep) {
case kRepFloat32:
opcode = kIA32Movss;
@@ -366,8 +370,7 @@ static void VisitBinop(InstructionSelector* selector,
Node* node,
outputs[output_count++] = g.DefineSameAsFirst(node);
if (cont->IsSet()) {
- // TODO(turbofan): Use byte register here.
- outputs[output_count++] = g.DefineAsRegister(cont->result());
+ outputs[output_count++] = g.DefineAsByteRegister(cont->result());
}
DCHECK_NE(0u, input_count);
@@ -827,8 +830,7 @@ void VisitCompare(InstructionSelector* selector,
InstructionCode opcode,
g.Label(cont->false_block()))->MarkAsControl();
} else {
DCHECK(cont->IsSet());
- // TODO(titzer): Needs byte register.
- selector->Emit(cont->Encode(opcode),
g.DefineAsRegister(cont->result()),
+ selector->Emit(cont->Encode(opcode),
g.DefineAsByteRegister(cont->result()),
left, right);
}
}
--
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