Reviewers: dusmil.imgtec,
Message:
Thanks, Dusan. I've uploaded a new patchset.
https://codereview.chromium.org/1116073002/diff/1/src/compiler/mips/instruction-selector-mips.cc
File src/compiler/mips/instruction-selector-mips.cc (right):
https://codereview.chromium.org/1116073002/diff/1/src/compiler/mips/instruction-selector-mips.cc#newcode984
src/compiler/mips/instruction-selector-mips.cc:984: kFpuMode == kFP64) {
On 2015/04/30 14:35:38, dusmil.imgtec wrote:
You should use IsFp64Mode() instead.
Done.
Description:
MIPS: Do not use the 64-bit floor and truncate instructions in FR=0 mode.
These instructions have unpredictable result when the processor is in 16 FP
registers mode.
BUG=
TEST=mjsunit/math-floor-global,math-floor-local,math-floor-part1
Please review this at https://codereview.chromium.org/1116073002/
Base URL: https://chromium.googlesource.com/v8/v8.git@master
Affected files (+2, -1 lines):
M src/compiler/mips/instruction-selector-mips.cc
Index: src/compiler/mips/instruction-selector-mips.cc
diff --git a/src/compiler/mips/instruction-selector-mips.cc
b/src/compiler/mips/instruction-selector-mips.cc
index
04b33ceceac820b77d10e5c3d470703b8402122e..5f64dbd16188b406d6e40c6960b56ccede1a2c67
100644
--- a/src/compiler/mips/instruction-selector-mips.cc
+++ b/src/compiler/mips/instruction-selector-mips.cc
@@ -980,7 +980,8 @@ InstructionSelector::SupportedMachineOperatorFlags() {
MachineOperatorBuilder::Flags flags =
MachineOperatorBuilder::kFloat32Abs |
MachineOperatorBuilder::kFloat64Abs;
- if (IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)) {
+ if ((IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)) &&
+ IsFp64Mode()) {
flags |= MachineOperatorBuilder::kFloat64RoundDown |
MachineOperatorBuilder::kFloat64RoundTruncate;
}
--
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